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mt7603: initialize aggregation control register

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Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
Felix Fietkau
2016-02-20 00:24:04 +01:00
parent 3d136ac90c
commit b1c8bc1980
2 changed files with 13 additions and 0 deletions
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mt7603_init.c
+5
View File
@@ -203,6 +203,11 @@ mt7603_mac_init(struct mt7603_dev *dev)
MT76_SET(MT_AGG_LIMIT_AC(2), 21) |
MT76_SET(MT_AGG_LIMIT_AC(3), 21));
mt76_wr(dev, MT_AGG_CONTROL,
MT76_SET(MT_AGG_CONTROL_BAR_RATE, 0x80) |
MT76_SET(MT_AGG_CONTROL_CFEND_RATE, 0x69) |
MT_AGG_CONTROL_NO_BA_AR_RULE);
mt76_rmw(dev, MT_DMA_DCR0, ~0xfffc, MT_RX_BUF_SIZE);
mt76_rmw(dev, MT_DMA_VCFR0, BIT(0), BIT(13));
mt7603_regs.h
+8
View File
@@ -149,6 +149,14 @@
#define MT_AGG_BA_SIZE_LIMIT_1 MT_WF_AGG(0x04c)
#define MT_AGG_BA_SIZE_LIMIT_SHIFT 8
#define MT_AGG_CONTROL MT_WF_AGG(0x070)
#define MT_AGG_CONTROL_NO_BA_RULE BIT(0)
#define MT_AGG_CONTROL_NO_BA_AR_RULE BIT(1)
#define MT_AGG_CONTROL_CFEND_SPE_EN BIT(3)
#define MT_AGG_CONTROL_CFEND_RATE GENMASK(15, 4)
#define MT_AGG_CONTROL_BAR_SPE_EN BIT(19)
#define MT_AGG_CONTROL_BAR_RATE GENMASK(31, 24)
#define MT_AGG_TMP MT_WF_AGG(0x0d8)
#define MT_AGG_BWCR MT_WF_AGG(0x0ec)