From b1c8bc1980f6b4bba9f0642d649e0246ac77d4ad Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Sat, 20 Feb 2016 00:24:04 +0100 Subject: [PATCH] mt7603: initialize aggregation control register Signed-off-by: Felix Fietkau --- mt7603_init.c | 5 +++++ mt7603_regs.h | 8 ++++++++ 2 files changed, 13 insertions(+) diff --git a/mt7603_init.c b/mt7603_init.c index 65005e24..c325d189 100644 --- a/mt7603_init.c +++ b/mt7603_init.c @@ -203,6 +203,11 @@ mt7603_mac_init(struct mt7603_dev *dev) MT76_SET(MT_AGG_LIMIT_AC(2), 21) | MT76_SET(MT_AGG_LIMIT_AC(3), 21)); + mt76_wr(dev, MT_AGG_CONTROL, + MT76_SET(MT_AGG_CONTROL_BAR_RATE, 0x80) | + MT76_SET(MT_AGG_CONTROL_CFEND_RATE, 0x69) | + MT_AGG_CONTROL_NO_BA_AR_RULE); + mt76_rmw(dev, MT_DMA_DCR0, ~0xfffc, MT_RX_BUF_SIZE); mt76_rmw(dev, MT_DMA_VCFR0, BIT(0), BIT(13)); diff --git a/mt7603_regs.h b/mt7603_regs.h index ad222289..5d84ec28 100644 --- a/mt7603_regs.h +++ b/mt7603_regs.h @@ -149,6 +149,14 @@ #define MT_AGG_BA_SIZE_LIMIT_1 MT_WF_AGG(0x04c) #define MT_AGG_BA_SIZE_LIMIT_SHIFT 8 +#define MT_AGG_CONTROL MT_WF_AGG(0x070) +#define MT_AGG_CONTROL_NO_BA_RULE BIT(0) +#define MT_AGG_CONTROL_NO_BA_AR_RULE BIT(1) +#define MT_AGG_CONTROL_CFEND_SPE_EN BIT(3) +#define MT_AGG_CONTROL_CFEND_RATE GENMASK(15, 4) +#define MT_AGG_CONTROL_BAR_SPE_EN BIT(19) +#define MT_AGG_CONTROL_BAR_RATE GENMASK(31, 24) + #define MT_AGG_TMP MT_WF_AGG(0x0d8) #define MT_AGG_BWCR MT_WF_AGG(0x0ec)