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mt7603: clean up ARB SCR register definition

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Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
Felix Fietkau
2016-02-26 19:30:30 +01:00
parent 6ece5201d3
commit 3a18d180c6
4 changed files with 14 additions and 14 deletions
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mt7603_beacon.c
+2 -2
View File
@@ -125,7 +125,7 @@ void mt7603_beacon_set_timer(struct mt7603_dev *dev, int idx, int intval)
if (!dev->beacon_mask) {
mt7603_irq_disable(dev, MT_INT_MAC_IRQ3);
mt76_clear(dev, MT_WF_ARB_SCR, MT_WF_ARB_BCNQ_OPMODE_MASK);
mt76_clear(dev, MT_ARB_SCR, MT_ARB_SCR_BCNQ_OPMODE_MASK);
mt76_wr(dev, MT_HW_INT_MASK(3), 0);
return;
}
@@ -135,7 +135,7 @@ void mt7603_beacon_set_timer(struct mt7603_dev *dev, int idx, int intval)
mt76_wr(dev, MT_TBTT_TIMER_CFG, 0x99); /* start timer */
mt76_rmw_field(dev, MT_WF_ARB_SCR, MT_WF_ARB_BCNQ_OPMODE_MASK,
mt76_rmw_field(dev, MT_ARB_SCR, MT_ARB_SCR_BCNQ_OPMODE_MASK,
MT_BCNQ_OPMODE_AP);
mt76_wr(dev, MT_PRE_TBTT, pre_tbtt);
mt7603_init.c
+1 -1
View File
@@ -70,7 +70,7 @@ mt7603_mac_early_init(struct mt7603_dev *dev)
{
mt76_wr(dev, MT_WPDMA_GLO_CFG, 0x52000850);
mt76_clear(dev, MT_WF_ARB_SCR, MT_WF_ARB_TX_DISABLE | MT_WF_ARB_RX_DISABLE);
mt76_clear(dev, MT_ARB_SCR, MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
mt76_wr(dev, MT_WF_ARB_TX_START_0, ~0);
mt76_clear(dev, MT_WF_ARB_RQCR, MT_WF_ARB_RQCR_RX_START);
mt7603_mac.c
+2 -2
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@@ -873,14 +873,14 @@ void mt7603_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q,
void mt7603_mac_start(struct mt7603_dev *dev)
{
mt76_clear(dev, MT_WF_ARB_SCR, MT_WF_ARB_TX_DISABLE | MT_WF_ARB_RX_DISABLE);
mt76_clear(dev, MT_ARB_SCR, MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
mt76_wr(dev, MT_WF_ARB_TX_START_0, ~0);
mt76_set(dev, MT_WF_ARB_RQCR, MT_WF_ARB_RQCR_RX_START);
}
void mt7603_mac_stop(struct mt7603_dev *dev)
{
mt76_set(dev, MT_WF_ARB_SCR, MT_WF_ARB_TX_DISABLE | MT_WF_ARB_RX_DISABLE);
mt76_set(dev, MT_ARB_SCR, MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
mt76_wr(dev, MT_WF_ARB_TX_START_0, 0);
mt76_clear(dev, MT_WF_ARB_RQCR, MT_WF_ARB_RQCR_RX_START);
}
mt7603_regs.h
+9 -9
View File
@@ -208,15 +208,15 @@
#define MT_WF_ARB_RQCR_RXV_R_EN BIT(7)
#define MT_WF_ARB_RQCR_RXV_T_EN BIT(8)
#define MT_WF_ARB_SCR MT_WF_ARB(0x080)
#define MT_WF_ARB_BCNQ_OPMODE_MASK GENMASK(1, 0)
#define MT_WF_ARB_BCNQ_OPMODE_SHIFT(n) (n * 2)
#define MT_WF_ARB_TX_DISABLE BIT(8)
#define MT_WF_ARB_RX_DISABLE BIT(9)
#define MT_WF_ARB_BCNQ_EMPTY_SKIP BIT(28)
#define MT_WF_ARB_TTTT_BTIM_PRIO BIT(29)
#define MT_WF_ARB_TBTT_BCN_PRIO BIT(30)
#define MT_WF_ARB_TBTT_BCAST_PRIO BIT(31)
#define MT_ARB_SCR MT_WF_ARB(0x080)
#define MT_ARB_SCR_BCNQ_OPMODE_MASK GENMASK(1, 0)
#define MT_ARB_SCR_BCNQ_OPMODE_SHIFT(n) (n * 2)
#define MT_ARB_SCR_TX_DISABLE BIT(8)
#define MT_ARB_SCR_RX_DISABLE BIT(9)
#define MT_ARB_SCR_BCNQ_EMPTY_SKIP BIT(28)
#define MT_ARB_SCR_TTTT_BTIM_PRIO BIT(29)
#define MT_ARB_SCR_TBTT_BCN_PRIO BIT(30)
#define MT_ARB_SCR_TBTT_BCAST_PRIO BIT(31)
enum {
MT_BCNQ_OPMODE_STA = 0,