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mt7603: initialize rate control registers

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Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
Felix Fietkau
2016-01-31 22:52:41 +01:00
parent fd2d3ce742
commit 3515557086
2 changed files with 22 additions and 0 deletions
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mt7603_init.c
+5
View File
@@ -215,6 +215,11 @@ mt7603_mac_init(struct mt7603_dev *dev)
mt76_wr(dev, MT_MAC_ADDR0(0), get_unaligned_le32(dev_addr));
mt76_wr(dev, MT_MAC_ADDR1(0),
get_unaligned_le16(dev_addr + 4) | MT_MAC_ADDR1_VALID);
mt76_wr(dev, MT_AGG_ARUCR, 0);
mt76_wr(dev, MT_AGG_ARDCR, ~0);
mt76_wr(dev, MT_AGG_ARCR, (MT_AGG_ARCR_INIT_RATE1 |
MT76_SET(MT_AGG_ARCR_RTS_RATE_THR, 2)));
}
static int
mt7603_regs.h
+17
View File
@@ -124,6 +124,23 @@
#define MT_WF_AGG_BASE 0x21200
#define MT_WF_AGG(ofs) (MT_WF_AGG_BASE + (ofs))
#define MT_AGG_ARCR MT_WF_AGG(0x010)
#define MT_AGG_ARCR_INIT_RATE1 BIT(0)
#define MT_AGG_ARCR_FB_SGI_DISABLE BIT(1)
#define MT_AGG_ARCR_RATE8_DOWN_WRAP BIT(2)
#define MT_AGG_ARCR_RTS_RATE_THR GENMASK(12, 8)
#define MT_AGG_ARCR_RATE_DOWN_RATIO GENMASK(17, 16)
#define MT_AGG_ARCR_RATE_DOWN_RATIO_EN BIT(19)
#define MT_AGG_ARCR_RATE_UP_EXTRA_TH GENMASK(22, 20)
#define MT_AGG_ARCR_SPE_DIS_TH GENMASK(27, 24)
#define MT_AGG_ARUCR MT_WF_AGG(0x014)
#define MT_AGG_ARDCR MT_WF_AGG(0x018)
#define MT_AGG_ARxCR_LIMIT_SHIFT(_n) (3 * _n)
#define MT_AGG_ARxCR_LIMIT(_n) GENMASK(3 + MT_AGG_ARxCR_LIMIT_SHIFT(_n), \
MT_AGG_ARxCR_LIMIT_SHIFT(_n))
#define MT_AGG_TMP MT_WF_AGG(0x0d8)
#define MT_AGG_BWCR MT_WF_AGG(0x0ec)