mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 13:26:48 +00:00
mt76x2: fix checkpatch warnings
Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
Felix Fietkau
@@ -180,10 +180,11 @@ void mt76x2_phy_calibrate(struct work_struct *work);
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void mt76x2_phy_set_txpower(struct mt76x2_dev *dev);
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int mt76x2_mcu_init(struct mt76x2_dev *dev);
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int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw, u8 bw_index,
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bool scan);
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int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw,
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u8 bw_index, bool scan);
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int mt76x2_mcu_set_radio_state(struct mt76x2_dev *dev, bool on);
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int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level, u8 channel);
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int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level,
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u8 channel);
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int mt76x2_mcu_cleanup(struct mt76x2_dev *dev);
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int mt76x2_dma_init(struct mt76x2_dev *dev);
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@@ -194,7 +195,7 @@ void mt76x2_cleanup(struct mt76x2_dev *dev);
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int mt76x2_tx_queue_mcu(struct mt76x2_dev *dev, enum mt76_txq_id qid,
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struct sk_buff *skb, int cmd, int seq);
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void mt76x2_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
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struct sk_buff *skb);
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struct sk_buff *skb);
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void mt76x2_tx_complete(struct mt76x2_dev *dev, struct sk_buff *skb);
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int mt76x2_tx_prepare_skb(struct mt76_dev *dev, void *txwi_ptr,
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struct sk_buff *skb, struct mt76_queue *q,
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@@ -32,6 +32,7 @@ void mt76x2_set_irq_mask(struct mt76x2_dev *dev, u32 clear, u32 set)
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void mt76x2_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
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{
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struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
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mt76x2_irq_enable(dev, MT_INT_RX_DONE(q));
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}
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+2
-1
@@ -96,5 +96,6 @@ void mt76x2_init_debugfs(struct mt76x2_dev *dev)
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debugfs_create_bool("tpc", S_IRUSR | S_IWUSR, dir, &dev->enable_tpc);
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debugfs_create_file("ampdu_stat", S_IRUSR, dir, dev, &fops_ampdu_stat);
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debugfs_create_devm_seqfile(dev->mt76.dev, "txpower", dir, read_txpower);
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debugfs_create_devm_seqfile(dev->mt76.dev, "txpower", dir,
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read_txpower);
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}
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+10
-10
@@ -33,7 +33,8 @@ mt76x2_tx_queue_mcu(struct mt76x2_dev *dev, enum mt76_txq_id qid,
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FIELD_PREP(MT_MCU_MSG_PORT, CPU_TX_PORT) |
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FIELD_PREP(MT_MCU_MSG_LEN, skb->len);
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addr = dma_map_single(dev->mt76.dev, skb->data, skb->len, DMA_TO_DEVICE);
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addr = dma_map_single(dev->mt76.dev, skb->data, skb->len,
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DMA_TO_DEVICE);
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if (dma_mapping_error(dev->mt76.dev, addr))
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return -ENOMEM;
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@@ -49,7 +50,7 @@ mt76x2_tx_queue_mcu(struct mt76x2_dev *dev, enum mt76_txq_id qid,
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static int
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mt76x2_init_tx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
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int idx, int n_desc)
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int idx, int n_desc)
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{
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int ret;
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@@ -79,8 +80,8 @@ void mt76x2_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
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skb_pull(skb, sizeof(struct mt76x2_rxwi));
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if (mt76x2_mac_process_rx(dev, skb, rxwi)) {
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dev_kfree_skb(skb);
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return;
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dev_kfree_skb(skb);
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return;
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}
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mt76_rx(&dev->mt76, q, skb);
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@@ -88,7 +89,7 @@ void mt76x2_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
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static int
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mt76x2_init_rx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
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int idx, int n_desc, int bufsize)
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int idx, int n_desc, int bufsize)
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{
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int ret;
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@@ -146,23 +147,22 @@ int mt76x2_dma_init(struct mt76x2_dev *dev)
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mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
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for (i = 0; i < ARRAY_SIZE(wmm_queue_map); i++) {
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ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[i], wmm_queue_map[i],
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MT_TX_RING_SIZE);
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ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[i],
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wmm_queue_map[i], MT_TX_RING_SIZE);
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if (ret)
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return ret;
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}
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ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_PSD],
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MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE);
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MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE);
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if (ret)
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return ret;
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ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_MCU],
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MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
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MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
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if (ret)
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return ret;
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ret = mt76x2_init_rx_queue(dev, &dev->mt76.q_rx[MT_RXQ_MCU], 1,
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MT_MCU_RING_SIZE, MT_RX_BUF_SIZE);
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if (ret)
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+28
-18
@@ -22,7 +22,7 @@
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static int
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mt76x2_eeprom_copy(struct mt76x2_dev *dev, enum mt76x2_eeprom_field field,
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void *dest, int len)
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void *dest, int len)
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{
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if (field + len > dev->mt76.eeprom.size)
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return -1;
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@@ -84,8 +84,8 @@ mt76x2_efuse_read(struct mt76x2_dev *dev, u16 addr, u8 *data)
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}
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for (i = 0; i < 4; i++) {
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val = mt76_rr(dev, MT_EFUSE_DATA(i));
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put_unaligned_le32(val, data + 4 * i);
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val = mt76_rr(dev, MT_EFUSE_DATA(i));
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put_unaligned_le32(val, data + 4 * i);
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}
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return 0;
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@@ -108,28 +108,29 @@ mt76x2_get_efuse_data(struct mt76x2_dev *dev, void *buf, int len)
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static bool
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mt76x2_has_cal_free_data(struct mt76x2_dev *dev, u8 *efuse)
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{
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if (get_unaligned_le16(efuse + MT_EE_NIC_CONF_0) != 0)
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u16 *efuse_w = (u16 *) efuse;
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if (efuse_w[MT_EE_NIC_CONF_0] != 0)
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return false;
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if (get_unaligned_le16(efuse + MT_EE_XTAL_TRIM_1) == 0xffff)
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if (efuse_w[MT_EE_XTAL_TRIM_1] == 0xffff)
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return false;
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if (get_unaligned_le16(efuse + MT_EE_TX_POWER_DELTA_BW40) != 0)
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if (efuse_w[MT_EE_TX_POWER_DELTA_BW40] != 0)
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return false;
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if (get_unaligned_le16(efuse + MT_EE_TX_POWER_0_START_2G) == 0xffff)
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if (efuse_w[MT_EE_TX_POWER_0_START_2G] == 0xffff)
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return false;
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if (get_unaligned_le16(efuse + MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA) != 0)
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if (efuse_w[MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA] != 0)
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return false;
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if (get_unaligned_le16(efuse + MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE) == 0xffff)
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if (efuse_w[MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE] == 0xffff)
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return false;
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return true;
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}
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static void
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mt76x2_apply_cal_free_data(struct mt76x2_dev *dev, u8 *efuse)
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{
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@@ -172,16 +173,19 @@ mt76x2_apply_cal_free_data(struct mt76x2_dev *dev, u8 *efuse)
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int i;
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if (!mt76x2_has_cal_free_data(dev, efuse))
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return;
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return;
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for (i = 0; i < ARRAY_SIZE(cal_free_bytes); i++) {
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int offset = cal_free_bytes[i];
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eeprom[offset] = efuse[offset];
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int offset = cal_free_bytes[i];
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eeprom[offset] = efuse[offset];
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}
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if (!(efuse[MT_EE_TX_POWER_0_START_5G] | efuse[MT_EE_TX_POWER_0_START_5G + 1]))
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if (!(efuse[MT_EE_TX_POWER_0_START_5G] |
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efuse[MT_EE_TX_POWER_0_START_5G + 1]))
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memcpy(eeprom + MT_EE_TX_POWER_0_START_5G, prev_grp0, 2);
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if (!(efuse[MT_EE_TX_POWER_1_START_5G] | efuse[MT_EE_TX_POWER_1_START_5G + 1]))
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if (!(efuse[MT_EE_TX_POWER_1_START_5G] |
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efuse[MT_EE_TX_POWER_1_START_5G + 1]))
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memcpy(eeprom + MT_EE_TX_POWER_1_START_5G, prev_grp0 + 2, 2);
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val = get_unaligned_le16(efuse + MT_EE_BT_RCAL_RESULT);
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@@ -205,7 +209,7 @@ static int mt76x2_check_eeprom(struct mt76x2_dev *dev)
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case 0x7612:
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return 0;
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default:
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printk("EEPROM data check failed: %04x\n", val);
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dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n", val);
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return -EINVAL;
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}
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}
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@@ -255,7 +259,9 @@ static inline int
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mt76x2_sign_extend(u32 val, unsigned size)
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{
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bool sign = val & BIT(size - 1);
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val &= BIT(size - 1) - 1;
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return sign ? val : -val;
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}
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@@ -263,6 +269,7 @@ static inline int
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mt76x2_sign_extend_optional(u32 val, unsigned size)
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{
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bool enable = val & BIT(size);
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return enable ? mt76x2_sign_extend(val, size) : 0;
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}
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@@ -319,8 +326,9 @@ mt76x2_get_cal_channel_group(int channel)
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static u8
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mt76x2_get_5g_rx_gain(struct mt76x2_dev *dev, u8 channel)
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{
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enum mt76x2_cal_channel_group group = mt76x2_get_cal_channel_group(channel);
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enum mt76x2_cal_channel_group group;
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group = mt76x2_get_cal_channel_group(channel);
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switch (group) {
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case MT_CH_5G_JAPAN:
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return mt76x2_eeprom_get(dev, MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN);
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@@ -502,11 +510,12 @@ mt76x2_get_power_info_5g(struct mt76x2_dev *dev, struct mt76x2_tx_power_info *t,
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int chain, int offset)
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{
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int channel = dev->mt76.chandef.chan->hw_value;
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enum mt76x2_cal_channel_group group = mt76x2_get_cal_channel_group(channel);
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enum mt76x2_cal_channel_group group;
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int delta_idx;
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u16 val;
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u8 data[5];
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group = mt76x2_get_cal_channel_group(channel);
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offset += group * MT_TX_POWER_GROUP_SIZE_5G;
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if (channel >= 192)
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@@ -548,6 +557,7 @@ mt76x2_get_power_info_5g(struct mt76x2_dev *dev, struct mt76x2_tx_power_info *t,
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void mt76x2_get_power_info(struct mt76x2_dev *dev, struct mt76x2_tx_power_info *t)
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{
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u16 bw40, bw80;
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memset(t, 0, sizeof(*t));
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bw40 = mt76x2_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW40);
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+2
-3
@@ -54,7 +54,6 @@ enum mt76x2_eeprom_field {
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MT_EE_TX_POWER_1_START_5G = 0x080,
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MT_EE_TX_POWER_CCK = 0x0a0,
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MT_EE_TX_POWER_OFDM_2G_6M = 0x0a2,
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MT_EE_TX_POWER_OFDM_2G_24M = 0x0a4,
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@@ -147,7 +146,8 @@ mt76x2_eeprom_get(struct mt76x2_dev *dev, enum mt76x2_eeprom_field field)
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}
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void mt76x2_get_rate_power(struct mt76x2_dev *dev, struct mt76_rate_power *t);
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void mt76x2_get_power_info(struct mt76x2_dev *dev, struct mt76x2_tx_power_info *t);
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void mt76x2_get_power_info(struct mt76x2_dev *dev,
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struct mt76x2_tx_power_info *t);
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int mt76x2_get_temp_comp(struct mt76x2_dev *dev, struct mt76x2_temp_comp *t);
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bool mt76x2_ext_pa_enabled(struct mt76x2_dev *dev, enum nl80211_band band);
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void mt76x2_read_rx_gain(struct mt76x2_dev *dev);
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@@ -167,7 +167,6 @@ mt76x2_tssi_enabled(struct mt76x2_dev *dev)
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MT_EE_NIC_CONF_1_TX_ALC_EN);
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}
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static inline bool
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mt76x2_has_ext_lna(struct mt76x2_dev *dev)
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{
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+6
-5
@@ -37,7 +37,7 @@ mt76x2_wait_for_mac(struct mt76x2_dev *dev)
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default:
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return true;
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}
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msleep(5);
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usleep_range(5000, 10000);
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}
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return false;
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@@ -265,7 +265,7 @@ int mt76x2_mac_reset(struct mt76x2_dev *dev, bool hard)
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mt76_wr(dev, MT_RF_BYPASS_0, 0x06000000);
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mt76_wr(dev, MT_RF_SETTING_0, 0x08800000);
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msleep(5);
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usleep_range(5000, 10000);
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mt76_wr(dev, MT_RF_BYPASS_0, 0x00000000);
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mt76_wr(dev, MT_MCU_CLOCK_CTL, 0x1401);
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@@ -334,7 +334,7 @@ int mt76x2_mac_start(struct mt76x2_dev *dev)
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mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX);
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wait_for_wpdma(dev);
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udelay(50);
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usleep_range(50, 100);
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mt76_set(dev, MT_WPDMA_GLO_CFG,
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MT_WPDMA_GLO_CFG_TX_DMA_EN |
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@@ -348,7 +348,8 @@ int mt76x2_mac_start(struct mt76x2_dev *dev)
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MT_MAC_SYS_CTRL_ENABLE_TX |
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MT_MAC_SYS_CTRL_ENABLE_RX);
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mt76x2_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | MT_INT_TX_STAT);
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mt76x2_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
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MT_INT_TX_STAT);
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return 0;
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}
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@@ -395,7 +396,6 @@ void mt76x2_mac_resume(struct mt76x2_dev *dev)
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MT_MAC_SYS_CTRL_ENABLE_RX);
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}
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static void
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mt76x2_power_on_rf_patch(struct mt76x2_dev *dev)
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{
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@@ -724,6 +724,7 @@ int mt76x2_register_device(struct mt76x2_dev *dev)
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for (i = 0; i < ARRAY_SIZE(dev->macaddr_list); i++) {
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u8 *addr = dev->macaddr_list[i].addr;
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memcpy(addr, dev->mt76.macaddr, ETH_ALEN);
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if (!i)
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+25
-18
@@ -95,8 +95,8 @@ mt76x2_mac_process_rate(struct ieee80211_rx_status *status, u16 rate)
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}
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static __le16
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mt76x2_mac_tx_rate_val(struct mt76x2_dev *dev, const struct ieee80211_tx_rate *rate,
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u8 *nss_val)
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mt76x2_mac_tx_rate_val(struct mt76x2_dev *dev,
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const struct ieee80211_tx_rate *rate, u8 *nss_val)
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{
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u16 rateval;
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u8 phy, rate_idx;
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@@ -146,7 +146,7 @@ mt76x2_mac_tx_rate_val(struct mt76x2_dev *dev, const struct ieee80211_tx_rate *r
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}
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void mt76x2_mac_wcid_set_rate(struct mt76x2_dev *dev, struct mt76_wcid *wcid,
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const struct ieee80211_tx_rate *rate)
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const struct ieee80211_tx_rate *rate)
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{
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spin_lock_bh(&dev->mt76.lock);
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wcid->tx_rate = mt76x2_mac_tx_rate_val(dev, rate, &wcid->tx_rate_nss);
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@@ -209,6 +209,7 @@ void mt76x2_mac_write_txwi(struct mt76x2_dev *dev, struct mt76x2_txwi *txwi,
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txwi->pktid |= MT_TXWI_PKTID_PROBE;
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if ((info->flags & IEEE80211_TX_CTL_AMPDU) && sta) {
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u8 ba_size = IEEE80211_MIN_AMPDU_BUF;
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ba_size <<= sta->ht_cap.ampdu_factor;
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ba_size = min_t(int, 63, ba_size - 1);
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if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
|
||||
@@ -217,7 +218,7 @@ void mt76x2_mac_write_txwi(struct mt76x2_dev *dev, struct mt76x2_txwi *txwi,
|
||||
|
||||
txwi_flags |= MT_TXWI_FLAGS_AMPDU |
|
||||
FIELD_PREP(MT_TXWI_FLAGS_MPDU_DENSITY,
|
||||
sta->ht_cap.ampdu_density);
|
||||
sta->ht_cap.ampdu_density);
|
||||
}
|
||||
|
||||
txwi->flags |= cpu_to_le16(txwi_flags);
|
||||
@@ -227,11 +228,13 @@ void mt76x2_mac_write_txwi(struct mt76x2_dev *dev, struct mt76x2_txwi *txwi,
|
||||
static void mt76x2_remove_hdr_pad(struct sk_buff *skb)
|
||||
{
|
||||
int len = ieee80211_get_hdrlen_from_skb(skb);
|
||||
|
||||
memmove(skb->data + 2, skb->data, len);
|
||||
skb_pull(skb, 2);
|
||||
}
|
||||
|
||||
int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb, void *rxi)
|
||||
int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb,
|
||||
void *rxi)
|
||||
{
|
||||
struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
|
||||
struct mt76x2_rxwi *rxwi = rxi;
|
||||
@@ -266,7 +269,7 @@ int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb, void *rxi
|
||||
|
||||
static void
|
||||
mt76x2_mac_process_tx_rate(struct ieee80211_tx_rate *txrate, u16 rate,
|
||||
enum nl80211_band band)
|
||||
enum nl80211_band band)
|
||||
{
|
||||
u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate);
|
||||
|
||||
@@ -323,7 +326,7 @@ mt76x2_mac_process_tx_rate(struct ieee80211_tx_rate *txrate, u16 rate,
|
||||
|
||||
static void
|
||||
mt76x2_mac_fill_tx_status(struct mt76x2_dev *dev, struct ieee80211_tx_info *info,
|
||||
struct mt76x2_tx_status *st, int n_frames)
|
||||
struct mt76x2_tx_status *st, int n_frames)
|
||||
{
|
||||
struct ieee80211_tx_rate *rate = info->status.rates;
|
||||
int cur_idx, last_rate;
|
||||
@@ -363,7 +366,7 @@ mt76x2_mac_fill_tx_status(struct mt76x2_dev *dev, struct ieee80211_tx_info *info
|
||||
|
||||
static void
|
||||
mt76x2_send_tx_status(struct mt76x2_dev *dev, struct mt76x2_tx_status *stat,
|
||||
u8 *update)
|
||||
u8 *update)
|
||||
{
|
||||
struct ieee80211_tx_info info = {};
|
||||
struct ieee80211_sta *sta = NULL;
|
||||
@@ -395,7 +398,7 @@ mt76x2_send_tx_status(struct mt76x2_dev *dev, struct mt76x2_tx_status *stat,
|
||||
goto out;
|
||||
|
||||
mt76x2_mac_fill_tx_status(dev, &info, &msta->status,
|
||||
msta->n_frames);
|
||||
msta->n_frames);
|
||||
|
||||
msta->status = *stat;
|
||||
if (*update == 1) {
|
||||
@@ -489,11 +492,10 @@ void mt76x2_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue *q,
|
||||
{
|
||||
struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
|
||||
|
||||
if (e->txwi) {
|
||||
if (e->txwi)
|
||||
mt76x2_mac_queue_txdone(dev, e->skb, &e->txwi->txwi);
|
||||
} else {
|
||||
else
|
||||
dev_kfree_skb_any(e->skb);
|
||||
}
|
||||
}
|
||||
|
||||
static enum mt76x2_cipher_type
|
||||
@@ -508,7 +510,7 @@ mt76x2_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data)
|
||||
|
||||
memcpy(key_data, key->key, key->keylen);
|
||||
|
||||
switch(key->cipher) {
|
||||
switch (key->cipher) {
|
||||
case WLAN_CIPHER_SUITE_WEP40:
|
||||
return MT_CIPHER_WEP40;
|
||||
case WLAN_CIPHER_SUITE_WEP104:
|
||||
@@ -539,7 +541,7 @@ void mt76x2_mac_wcid_setup(struct mt76x2_dev *dev, u8 idx, u8 vif_idx, u8 *mac)
|
||||
}
|
||||
|
||||
int mt76x2_mac_wcid_set_key(struct mt76x2_dev *dev, u8 idx,
|
||||
struct ieee80211_key_conf *key)
|
||||
struct ieee80211_key_conf *key)
|
||||
{
|
||||
enum mt76x2_cipher_type cipher;
|
||||
u8 key_data[32];
|
||||
@@ -582,7 +584,8 @@ int mt76x2_mac_shared_key_setup(struct mt76x2_dev *dev, u8 vif_idx, u8 key_idx,
|
||||
val |= cipher << MT_SKEY_MODE_SHIFT(vif_idx, key_idx);
|
||||
mt76_wr(dev, MT_SKEY_MODE(vif_idx), val);
|
||||
|
||||
mt76_wr_copy(dev, MT_SKEY(vif_idx, key_idx), key_data, sizeof(key_data));
|
||||
mt76_wr_copy(dev, MT_SKEY(vif_idx, key_idx), key_data,
|
||||
sizeof(key_data));
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -620,7 +623,8 @@ __mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 bcn_idx, struct sk_buff *skb)
|
||||
if (skb) {
|
||||
ret = mt76_write_beacon(dev, beacon_addr, skb);
|
||||
if (!ret)
|
||||
dev->beacon_data_mask |= BIT(bcn_idx) & dev->beacon_mask;
|
||||
dev->beacon_data_mask |= BIT(bcn_idx) &
|
||||
dev->beacon_mask;
|
||||
} else {
|
||||
dev->beacon_data_mask &= ~BIT(bcn_idx);
|
||||
for (i = 0; i < beacon_len; i += 4)
|
||||
@@ -632,7 +636,8 @@ __mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 bcn_idx, struct sk_buff *skb)
|
||||
return ret;
|
||||
}
|
||||
|
||||
int mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 vif_idx, struct sk_buff *skb)
|
||||
int mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 vif_idx,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
bool force_update = false;
|
||||
int bcn_idx = 0;
|
||||
@@ -661,7 +666,8 @@ int mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 vif_idx, struct sk_buff *sk
|
||||
__mt76x2_mac_set_beacon(dev, i, NULL);
|
||||
}
|
||||
|
||||
mt76_rmw_field(dev, MT_MAC_BSSID_DW1, MT_MAC_BSSID_DW1_MBEACON_N, bcn_idx - 1);
|
||||
mt76_rmw_field(dev, MT_MAC_BSSID_DW1, MT_MAC_BSSID_DW1_MBEACON_N,
|
||||
bcn_idx - 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -721,6 +727,7 @@ void mt76x2_mac_work(struct work_struct *work)
|
||||
mt76x2_update_channel(&dev->mt76);
|
||||
for (i = 0, idx = 0; i < 16; i++) {
|
||||
u32 val = mt76_rr(dev, MT_TX_AGG_CNT(i));
|
||||
|
||||
dev->aggr_stats[idx++] += val & 0xffff;
|
||||
dev->aggr_stats[idx++] += val >> 16;
|
||||
}
|
||||
|
||||
+9
-7
@@ -110,7 +110,7 @@ struct mt76x2_rxwi {
|
||||
|
||||
#define MT_TX_PWR_ADJ GENMASK(3, 0)
|
||||
|
||||
enum mt76x2_phy_bandwith {
|
||||
enum mt76x2_phy_bandwidth {
|
||||
MT_PHY_BW_20,
|
||||
MT_PHY_BW_40,
|
||||
MT_PHY_BW_80,
|
||||
@@ -149,11 +149,11 @@ struct mt76x2_txwi {
|
||||
u8 pktid;
|
||||
} __packed __aligned(4);
|
||||
|
||||
|
||||
static inline struct mt76x2_tx_info *
|
||||
mt76x2_skb_tx_info(struct sk_buff *skb)
|
||||
{
|
||||
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
||||
|
||||
return (void *) info->status.status_driver_data;
|
||||
}
|
||||
|
||||
@@ -163,20 +163,22 @@ void mt76x2_mac_stop(struct mt76x2_dev *dev, bool force);
|
||||
void mt76x2_mac_resume(struct mt76x2_dev *dev);
|
||||
void mt76x2_mac_set_bssid(struct mt76x2_dev *dev, u8 idx, const u8 *addr);
|
||||
|
||||
int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb, void *rxwi);
|
||||
int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb,
|
||||
void *rxwi);
|
||||
void mt76x2_mac_write_txwi(struct mt76x2_dev *dev, struct mt76x2_txwi *txwi,
|
||||
struct sk_buff *skb, struct mt76_wcid *wcid,
|
||||
struct ieee80211_sta *sta);
|
||||
void mt76x2_mac_wcid_setup(struct mt76x2_dev *dev, u8 idx, u8 vif_idx, u8 *mac);
|
||||
int mt76x2_mac_wcid_set_key(struct mt76x2_dev *dev, u8 idx,
|
||||
struct ieee80211_key_conf *key);
|
||||
struct ieee80211_key_conf *key);
|
||||
void mt76x2_mac_wcid_set_rate(struct mt76x2_dev *dev, struct mt76_wcid *wcid,
|
||||
const struct ieee80211_tx_rate *rate);
|
||||
const struct ieee80211_tx_rate *rate);
|
||||
|
||||
int mt76x2_mac_shared_key_setup(struct mt76x2_dev *dev, u8 vif_idx, u8 key_idx,
|
||||
struct ieee80211_key_conf *key);
|
||||
struct ieee80211_key_conf *key);
|
||||
|
||||
int mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 vif_idx, struct sk_buff *skb);
|
||||
int mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 vif_idx,
|
||||
struct sk_buff *skb);
|
||||
void mt76x2_mac_set_beacon_enable(struct mt76x2_dev *dev, u8 vif_idx, bool val);
|
||||
|
||||
void mt76x2_mac_poll_tx_status(struct mt76x2_dev *dev, bool irq);
|
||||
|
||||
+29
-19
@@ -63,10 +63,14 @@ mt76x2_txq_init(struct mt76x2_dev *dev, struct ieee80211_txq *txq)
|
||||
|
||||
mtxq = (struct mt76_txq *) txq->drv_priv;
|
||||
if (txq->sta) {
|
||||
struct mt76x2_sta *sta = (struct mt76x2_sta *) txq->sta->drv_priv;
|
||||
struct mt76x2_sta *sta;
|
||||
|
||||
sta = (struct mt76x2_sta *) txq->sta->drv_priv;
|
||||
mtxq->wcid = &sta->wcid;
|
||||
} else {
|
||||
struct mt76x2_vif *mvif = (struct mt76x2_vif *) txq->vif->drv_priv;
|
||||
struct mt76x2_vif *mvif;
|
||||
|
||||
mvif = (struct mt76x2_vif *) txq->vif->drv_priv;
|
||||
mtxq->wcid = &mvif->group_wcid;
|
||||
}
|
||||
|
||||
@@ -169,7 +173,7 @@ mt76x2_config(struct ieee80211_hw *hw, u32 changed)
|
||||
|
||||
static void
|
||||
mt76x2_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
|
||||
unsigned int *total_flags, u64 multicast)
|
||||
unsigned int *total_flags, u64 multicast)
|
||||
{
|
||||
struct mt76x2_dev *dev = hw->priv;
|
||||
u32 flags = 0;
|
||||
@@ -202,7 +206,7 @@ mt76x2_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
|
||||
|
||||
static void
|
||||
mt76x2_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
struct ieee80211_bss_conf *info, u32 changed)
|
||||
struct ieee80211_bss_conf *info, u32 changed)
|
||||
{
|
||||
struct mt76x2_dev *dev = hw->priv;
|
||||
struct mt76x2_vif *mvif = (struct mt76x2_vif *) vif->drv_priv;
|
||||
@@ -219,7 +223,8 @@ mt76x2_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
|
||||
if (changed & BSS_CHANGED_BEACON_ENABLED) {
|
||||
tasklet_disable(&dev->pre_tbtt_tasklet);
|
||||
mt76x2_mac_set_beacon_enable(dev, mvif->idx, info->enable_beacon);
|
||||
mt76x2_mac_set_beacon_enable(dev, mvif->idx,
|
||||
info->enable_beacon);
|
||||
tasklet_enable(&dev->pre_tbtt_tasklet);
|
||||
}
|
||||
|
||||
@@ -236,7 +241,7 @@ mt76x2_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
|
||||
static int
|
||||
mt76x2_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta)
|
||||
struct ieee80211_sta *sta)
|
||||
{
|
||||
struct mt76x2_dev *dev = hw->priv;
|
||||
struct mt76x2_sta *msta = (struct mt76x2_sta *) sta->drv_priv;
|
||||
@@ -270,7 +275,7 @@ out:
|
||||
|
||||
static int
|
||||
mt76x2_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta)
|
||||
struct ieee80211_sta *sta)
|
||||
{
|
||||
struct mt76x2_dev *dev = hw->priv;
|
||||
struct mt76x2_sta *msta = (struct mt76x2_sta *) sta->drv_priv;
|
||||
@@ -291,7 +296,7 @@ mt76x2_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
|
||||
static void
|
||||
mt76x2_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
|
||||
enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
|
||||
{
|
||||
struct mt76x2_sta *msta = (struct mt76x2_sta *) sta->drv_priv;
|
||||
struct mt76x2_dev *dev = hw->priv;
|
||||
@@ -310,16 +315,19 @@ mt76x2_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
|
||||
static int
|
||||
mt76x2_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
||||
struct ieee80211_vif *vif, struct ieee80211_sta *sta,
|
||||
struct ieee80211_key_conf *key)
|
||||
struct ieee80211_vif *vif, struct ieee80211_sta *sta,
|
||||
struct ieee80211_key_conf *key)
|
||||
{
|
||||
struct mt76x2_dev *dev = hw->priv;
|
||||
struct mt76x2_vif *mvif = (struct mt76x2_vif *) vif->drv_priv;
|
||||
struct mt76x2_sta *msta = sta ? (struct mt76x2_sta *) sta->drv_priv : NULL;
|
||||
struct mt76_wcid *wcid = msta ? &msta->wcid : &mvif->group_wcid;
|
||||
struct mt76x2_sta *msta;
|
||||
struct mt76_wcid *wcid;
|
||||
int idx = key->keyidx;
|
||||
int ret;
|
||||
|
||||
msta = sta ? (struct mt76x2_sta *) sta->drv_priv : NULL;
|
||||
wcid = msta ? &msta->wcid : &mvif->group_wcid;
|
||||
|
||||
if (cmd == SET_KEY) {
|
||||
key->hw_key_idx = wcid->idx;
|
||||
wcid->hw_key_idx = idx;
|
||||
@@ -345,7 +353,7 @@ mt76x2_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
||||
|
||||
static int
|
||||
mt76x2_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue,
|
||||
const struct ieee80211_tx_queue_params *params)
|
||||
const struct ieee80211_tx_queue_params *params)
|
||||
{
|
||||
struct mt76x2_dev *dev = hw->priv;
|
||||
u8 cw_min = 5, cw_max = 10;
|
||||
@@ -386,7 +394,8 @@ mt76x2_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue,
|
||||
}
|
||||
|
||||
static void
|
||||
mt76x2_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, const u8 *mac)
|
||||
mt76x2_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
const u8 *mac)
|
||||
{
|
||||
struct mt76x2_dev *dev = hw->priv;
|
||||
|
||||
@@ -406,7 +415,7 @@ mt76x2_sw_scan_complete(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
|
||||
|
||||
static void
|
||||
mt76x2_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
u32 queues, bool drop)
|
||||
u32 queues, bool drop)
|
||||
{
|
||||
}
|
||||
|
||||
@@ -437,10 +446,11 @@ mt76x2_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
|
||||
switch (action) {
|
||||
case IEEE80211_AMPDU_RX_START:
|
||||
mt76_set(dev, MT_WCID_ADDR(msta->wcid.idx)+4, BIT(16 + tid));
|
||||
mt76_set(dev, MT_WCID_ADDR(msta->wcid.idx) + 4, BIT(16 + tid));
|
||||
break;
|
||||
case IEEE80211_AMPDU_RX_STOP:
|
||||
mt76_clear(dev, MT_WCID_ADDR(msta->wcid.idx)+4, BIT(16 + tid));
|
||||
mt76_clear(dev, MT_WCID_ADDR(msta->wcid.idx) + 4,
|
||||
BIT(16 + tid));
|
||||
break;
|
||||
case IEEE80211_AMPDU_TX_OPERATIONAL:
|
||||
mtxq->aggr = true;
|
||||
@@ -467,7 +477,7 @@ mt76x2_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
|
||||
static void
|
||||
mt76x2_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta)
|
||||
struct ieee80211_sta *sta)
|
||||
{
|
||||
struct mt76x2_dev *dev = hw->priv;
|
||||
struct mt76x2_sta *msta = (struct mt76x2_sta *) sta->drv_priv;
|
||||
@@ -484,7 +494,7 @@ mt76x2_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
}
|
||||
|
||||
static void mt76x2_set_coverage_class(struct ieee80211_hw *hw,
|
||||
s16 coverage_class)
|
||||
s16 coverage_class)
|
||||
{
|
||||
struct mt76x2_dev *dev = hw->priv;
|
||||
|
||||
|
||||
+30
-22
@@ -66,7 +66,8 @@ mt76x2_mcu_get_response(struct mt76x2_dev *dev, unsigned long expires)
|
||||
}
|
||||
|
||||
static int
|
||||
mt76x2_mcu_msg_send(struct mt76x2_dev *dev, struct sk_buff *skb, enum mcu_cmd cmd)
|
||||
mt76x2_mcu_msg_send(struct mt76x2_dev *dev, struct sk_buff *skb,
|
||||
enum mcu_cmd cmd)
|
||||
{
|
||||
unsigned long expires = jiffies + HZ;
|
||||
int ret;
|
||||
@@ -91,7 +92,9 @@ mt76x2_mcu_msg_send(struct mt76x2_dev *dev, struct sk_buff *skb, enum mcu_cmd cm
|
||||
|
||||
skb = mt76x2_mcu_get_response(dev, expires);
|
||||
if (!skb) {
|
||||
printk("MCU message %d (seq %d) timed out\n", cmd, seq);
|
||||
dev_err(dev->mt76.dev,
|
||||
"MCU message %d (seq %d) timed out\n", cmd,
|
||||
seq);
|
||||
ret = -ETIMEDOUT;
|
||||
break;
|
||||
}
|
||||
@@ -123,7 +126,8 @@ mt76pci_load_rom_patch(struct mt76x2_dev *dev)
|
||||
u32 patch_mask, patch_reg;
|
||||
|
||||
if (rom_protect && !mt76_poll(dev, MT_MCU_SEMAPHORE_03, 1, 1, 600)) {
|
||||
printk("Could not get hardware semaphore for ROM PATCH\n");
|
||||
dev_err(dev->mt76.dev,
|
||||
"Could not get hardware semaphore for ROM PATCH\n");
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
@@ -136,7 +140,7 @@ mt76pci_load_rom_patch(struct mt76x2_dev *dev)
|
||||
}
|
||||
|
||||
if (rom_protect && (mt76_rr(dev, patch_reg) & patch_mask)) {
|
||||
printk("ROM patch already applied\n");
|
||||
dev_info(dev->mt76.dev, "ROM patch already applied\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
@@ -151,7 +155,7 @@ mt76pci_load_rom_patch(struct mt76x2_dev *dev)
|
||||
}
|
||||
|
||||
hdr = (struct mt76x2_patch_header *) fw->data;
|
||||
printk("ROM patch build: %.15s\n", hdr->build_time);
|
||||
dev_info(dev->mt76.dev, "ROM patch build: %.15s\n", hdr->build_time);
|
||||
|
||||
mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, MT_MCU_ROM_PATCH_OFFSET);
|
||||
|
||||
@@ -165,7 +169,7 @@ mt76pci_load_rom_patch(struct mt76x2_dev *dev)
|
||||
mt76_wr(dev, MT_MCU_INT_LEVEL, 4);
|
||||
|
||||
if (!mt76_poll_msec(dev, patch_reg, patch_mask, patch_mask, 2000)) {
|
||||
printk("Failed to load ROM patch\n");
|
||||
dev_err(dev->mt76.dev, "Failed to load ROM patch\n");
|
||||
ret = -ETIMEDOUT;
|
||||
}
|
||||
|
||||
@@ -203,12 +207,12 @@ mt76pci_load_firmware(struct mt76x2_dev *dev)
|
||||
goto error;
|
||||
|
||||
val = le16_to_cpu(hdr->fw_ver);
|
||||
printk("Firmware Version: %d.%d.%02d\n",
|
||||
(val >> 12) & 0xf, (val >> 8) & 0xf, val & 0xf);
|
||||
dev_info(dev->mt76.dev, "Firmware Version: %d.%d.%02d\n",
|
||||
(val >> 12) & 0xf, (val >> 8) & 0xf, val & 0xf);
|
||||
|
||||
val = le16_to_cpu(hdr->build_ver);
|
||||
printk("Build: %x\n", val);
|
||||
printk("Build Time: %.16s\n", hdr->build_time);
|
||||
dev_info(dev->mt76.dev, "Build: %x\n", val);
|
||||
dev_info(dev->mt76.dev, "Build Time: %.16s\n", hdr->build_time);
|
||||
|
||||
cur = (__le32 *) (fw->data + sizeof(*hdr));
|
||||
len = le32_to_cpu(hdr->ilm_len);
|
||||
@@ -245,25 +249,26 @@ mt76pci_load_firmware(struct mt76x2_dev *dev)
|
||||
}
|
||||
|
||||
if (!i) {
|
||||
printk("Firmware failed to start\n");
|
||||
dev_err(dev->mt76.dev, "Firmware failed to start\n");
|
||||
release_firmware(fw);
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
printk("Firmware running!\n");
|
||||
dev_info(dev->mt76.dev, "Firmware running!\n");
|
||||
|
||||
release_firmware(fw);
|
||||
|
||||
return ret;
|
||||
|
||||
error:
|
||||
printk("Invalid firmware\n");
|
||||
dev_err(dev->mt76.dev, "Invalid firmware\n");
|
||||
release_firmware(fw);
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
static int
|
||||
mt76x2_mcu_function_select(struct mt76x2_dev *dev, enum mcu_function func, u32 val)
|
||||
mt76x2_mcu_function_select(struct mt76x2_dev *dev, enum mcu_function func,
|
||||
u32 val)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
struct {
|
||||
@@ -278,7 +283,8 @@ mt76x2_mcu_function_select(struct mt76x2_dev *dev, enum mcu_function func, u32 v
|
||||
return mt76x2_mcu_msg_send(dev, skb, CMD_FUN_SET_OP);
|
||||
}
|
||||
|
||||
int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level, u8 channel)
|
||||
int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level,
|
||||
u8 channel)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
struct {
|
||||
@@ -305,8 +311,8 @@ int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level, u8 channe
|
||||
return mt76x2_mcu_msg_send(dev, skb, CMD_LOAD_CR);
|
||||
}
|
||||
|
||||
int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw, u8 bw_index,
|
||||
bool scan)
|
||||
int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw,
|
||||
u8 bw_index, bool scan)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
struct {
|
||||
@@ -330,7 +336,7 @@ int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw, u8 bw_inde
|
||||
skb = mt76x2_mcu_msg_alloc(dev, &msg, sizeof(msg));
|
||||
mt76x2_mcu_msg_send(dev, skb, CMD_SWITCH_CHANNEL_OP);
|
||||
|
||||
msleep(5);
|
||||
usleep_range(5000, 10000);
|
||||
|
||||
msg.ext_chan = 0xe0 + bw_index;
|
||||
skb = mt76x2_mcu_msg_alloc(dev, &msg, sizeof(msg));
|
||||
@@ -353,7 +359,7 @@ int mt76x2_mcu_set_radio_state(struct mt76x2_dev *dev, bool on)
|
||||
}
|
||||
|
||||
int mt76x2_mcu_calibrate(struct mt76x2_dev *dev, enum mcu_calibration type,
|
||||
u32 param)
|
||||
u32 param)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
struct {
|
||||
@@ -379,7 +385,8 @@ int mt76x2_mcu_calibrate(struct mt76x2_dev *dev, enum mcu_calibration type,
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mt76x2_mcu_tssi_comp(struct mt76x2_dev *dev, struct mt76x2_tssi_comp *tssi_data)
|
||||
int mt76x2_mcu_tssi_comp(struct mt76x2_dev *dev,
|
||||
struct mt76x2_tssi_comp *tssi_data)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
struct {
|
||||
@@ -394,7 +401,8 @@ int mt76x2_mcu_tssi_comp(struct mt76x2_dev *dev, struct mt76x2_tssi_comp *tssi_d
|
||||
return mt76x2_mcu_msg_send(dev, skb, CMD_CALIBRATION_OP);
|
||||
}
|
||||
|
||||
int mt76x2_mcu_init_gain(struct mt76x2_dev *dev, u8 channel, u32 gain, bool force)
|
||||
int mt76x2_mcu_init_gain(struct mt76x2_dev *dev, u8 channel, u32 gain,
|
||||
bool force)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
struct {
|
||||
@@ -435,7 +443,7 @@ int mt76x2_mcu_cleanup(struct mt76x2_dev *dev)
|
||||
struct sk_buff *skb;
|
||||
|
||||
mt76_wr(dev, MT_MCU_INT_LEVEL, 1);
|
||||
msleep(20);
|
||||
usleep_range(20000, 30000);
|
||||
|
||||
while ((skb = skb_dequeue(&dev->mcu.res_q)) != NULL)
|
||||
dev_kfree_skb(skb);
|
||||
|
||||
+3
-2
@@ -128,8 +128,9 @@ struct mt76x2_tssi_comp {
|
||||
} __packed __aligned(4);
|
||||
|
||||
int mt76x2_mcu_calibrate(struct mt76x2_dev *dev, enum mcu_calibration type,
|
||||
u32 param);
|
||||
u32 param);
|
||||
int mt76x2_mcu_tssi_comp(struct mt76x2_dev *dev, struct mt76x2_tssi_comp *data);
|
||||
int mt76x2_mcu_init_gain(struct mt76x2_dev *dev, u8 channel, u32 gain, bool force);
|
||||
int mt76x2_mcu_init_gain(struct mt76x2_dev *dev, u8 channel, u32 gain,
|
||||
bool force);
|
||||
|
||||
#endif
|
||||
|
||||
+1
-1
@@ -54,7 +54,7 @@ mt76pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]);
|
||||
|
||||
dev->mt76.rev = mt76_rr(dev, MT_ASIC_VERSION);
|
||||
dev_printk(KERN_INFO, dev->mt76.dev, "ASIC revision: %08x\n", dev->mt76.rev);
|
||||
dev_info(dev->mt76.dev, "ASIC revision: %08x\n", dev->mt76.rev);
|
||||
|
||||
ret = devm_request_irq(dev->mt76.dev, pdev->irq, mt76x2_irq_handler,
|
||||
IRQF_SHARED, KBUILD_MODNAME, dev);
|
||||
|
||||
+8
-5
@@ -281,12 +281,14 @@ mt76x2_phy_set_txpower_regs(struct mt76x2_dev *dev, enum nl80211_band band)
|
||||
|
||||
if (mt76x2_ext_pa_enabled(dev, band)) {
|
||||
u32 val = 0x3c3c023c;
|
||||
|
||||
mt76_wr(dev, MT_TX0_RF_GAIN_CORR, val);
|
||||
mt76_wr(dev, MT_TX1_RF_GAIN_CORR, val);
|
||||
mt76_wr(dev, MT_TX_ALC_CFG_4, 0x00001818);
|
||||
} else {
|
||||
if (band == NL80211_BAND_2GHZ) {
|
||||
u32 val = 0x0f3c3c3c;
|
||||
|
||||
mt76_wr(dev, MT_TX0_RF_GAIN_CORR, val);
|
||||
mt76_wr(dev, MT_TX1_RF_GAIN_CORR, val);
|
||||
mt76_wr(dev, MT_TX_ALC_CFG_4, 0x00000606);
|
||||
@@ -410,12 +412,13 @@ mt76x2_phy_update_channel_gain(struct mt76x2_dev *dev)
|
||||
u32 val = mt76_rr(dev, MT_BBP(AGC, 20));
|
||||
int rssi0 = (s8) FIELD_GET(MT_BBP_AGC20_RSSI0, val);
|
||||
int rssi1 = (s8) FIELD_GET(MT_BBP_AGC20_RSSI1, val);
|
||||
bool low_gain;
|
||||
u8 *gain = dev->cal.agc_gain_init, gain_delta;
|
||||
bool low_gain;
|
||||
|
||||
dev->cal.avg_rssi[0] = (dev->cal.avg_rssi[0] * 15) / 16 + (rssi0 << 8);
|
||||
dev->cal.avg_rssi[1] = (dev->cal.avg_rssi[1] * 15) / 16 + (rssi1 << 8);
|
||||
dev->cal.avg_rssi_all = (dev->cal.avg_rssi[0] + dev->cal.avg_rssi[1]) / 512;
|
||||
dev->cal.avg_rssi_all = (dev->cal.avg_rssi[0] +
|
||||
dev->cal.avg_rssi[1]) / 512;
|
||||
|
||||
low_gain = dev->cal.avg_rssi_all > mt76x2_get_rssi_gain_thresh(dev);
|
||||
if (dev->cal.low_gain == low_gain)
|
||||
@@ -455,7 +458,7 @@ mt76x2_phy_update_channel_gain(struct mt76x2_dev *dev)
|
||||
}
|
||||
|
||||
int mt76x2_phy_set_channel(struct mt76x2_dev *dev,
|
||||
struct cfg80211_chan_def *chandef)
|
||||
struct cfg80211_chan_def *chandef)
|
||||
{
|
||||
struct ieee80211_channel *chan = chandef->chan;
|
||||
bool scan = test_bit(MT76_SCANNING, &dev->mt76.state);
|
||||
@@ -553,7 +556,7 @@ int mt76x2_phy_set_channel(struct mt76x2_dev *dev,
|
||||
|
||||
/* Enable LDPC Rx */
|
||||
if (mt76xx_rev(dev) >= MT76XX_REV_E3)
|
||||
mt76_set(dev, MT_BBP(RXO, 13), BIT(10));
|
||||
mt76_set(dev, MT_BBP(RXO, 13), BIT(10));
|
||||
|
||||
if (!dev->cal.init_cal_done) {
|
||||
u8 val = mt76x2_eeprom_get(dev, MT_EE_BT_RCAL_RESULT);
|
||||
@@ -624,7 +627,7 @@ mt76x2_phy_tssi_compensate(struct mt76x2_dev *dev)
|
||||
if (t.pa_mode || dev->cal.dpd_cal_done)
|
||||
return;
|
||||
|
||||
msleep(10);
|
||||
usleep_range(10000, 20000);
|
||||
mt76x2_mcu_calibrate(dev, MCU_CAL_DPD, chan->hw_value);
|
||||
dev->cal.dpd_cal_done = true;
|
||||
}
|
||||
|
||||
+7
-3
@@ -33,10 +33,12 @@ void mt76x2_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
|
||||
|
||||
if (control->sta) {
|
||||
struct mt76x2_sta *msta;
|
||||
|
||||
msta = (struct mt76x2_sta *) control->sta->drv_priv;
|
||||
wcid = &msta->wcid;
|
||||
} else if (vif) {
|
||||
struct mt76x2_vif *mvif;
|
||||
|
||||
mvif = (struct mt76x2_vif *) vif->drv_priv;
|
||||
wcid = &mvif->group_wcid;
|
||||
}
|
||||
@@ -132,9 +134,11 @@ static int mt76x2_insert_hdr_pad(struct sk_buff *skb)
|
||||
if (len % 4 == 0)
|
||||
return 0;
|
||||
|
||||
if (skb_headroom(skb) < 2 &&
|
||||
(ret = pskb_expand_head(skb, 2, 0, GFP_ATOMIC)) != 0)
|
||||
return ret;
|
||||
if (skb_headroom(skb) < 2) {
|
||||
ret = pskb_expand_head(skb, 2, 0, GFP_ATOMIC);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
skb_push(skb, 2);
|
||||
memmove(skb->data, skb->data + 2, len);
|
||||
|
||||
Reference in New Issue
Block a user