core: fix checkpatch errors

Signed-off-by: Felix Fietkau <[email protected]>

debugfs.c

@@ -64,7 +64,8 @@ struct dentry *mt76_register_debugfs(struct mt76_dev *dev)
 		return NULL;
 
 	debugfs_create_u32("regidx", S_IRUSR | S_IWUSR, dir, &dev->debugfs_reg);
-	debugfs_create_file("regval", S_IRUSR | S_IWUSR, dir, dev, &fops_regval);
+	debugfs_create_file("regval", S_IRUSR | S_IWUSR, dir, dev,
+			    &fops_regval);
 	debugfs_create_blob("eeprom", S_IRUSR, dir, &dev->eeprom);
 	if (dev->otp.data)
 		debugfs_create_blob("otp", S_IRUSR, dir, &dev->otp);

dma.c

@@ -82,10 +82,10 @@ mt76_dma_add_buf(struct mt76_dev *dev, struct mt76_queue *q,
 
 		desc = &q->desc[idx];
 
-		ACCESS_ONCE(desc->buf0) = cpu_to_le32(buf0);
-		ACCESS_ONCE(desc->buf1) = cpu_to_le32(buf1);
-		ACCESS_ONCE(desc->info) = cpu_to_le32(info);
-		ACCESS_ONCE(desc->ctrl) = cpu_to_le32(ctrl);
+		WRITE_ONCE(desc->buf0, cpu_to_le32(buf0));
+		WRITE_ONCE(desc->buf1, cpu_to_le32(buf1));
+		WRITE_ONCE(desc->info, cpu_to_le32(info));
+		WRITE_ONCE(desc->ctrl, cpu_to_le32(ctrl));
 
 		q->queued++;
 	}
@@ -101,19 +101,21 @@ mt76_dma_tx_cleanup_idx(struct mt76_dev *dev, struct mt76_queue *q, int idx,
 			struct mt76_queue_entry *prev_e)
 {
 	struct mt76_queue_entry *e = &q->entry[idx];
-	__le32 __ctrl = ACCESS_ONCE(q->desc[idx].ctrl);
+	__le32 __ctrl = READ_ONCE(q->desc[idx].ctrl);
 	u32 ctrl = le32_to_cpu(__ctrl);
 
 	if (!e->txwi || !e->skb) {
-		__le32 addr = ACCESS_ONCE(q->desc[idx].buf0);
+		__le32 addr = READ_ONCE(q->desc[idx].buf0);
 		u32 len = FIELD_GET(MT_DMA_CTL_SD_LEN0, ctrl);
+
 		dma_unmap_single(dev->dev, le32_to_cpu(addr), len,
 				 DMA_TO_DEVICE);
 	}
 
 	if (!(ctrl & MT_DMA_CTL_LAST_SEC0)) {
-		__le32 addr = ACCESS_ONCE(q->desc[idx].buf1);
+		__le32 addr = READ_ONCE(q->desc[idx].buf1);
 		u32 len = FIELD_GET(MT_DMA_CTL_SD_LEN1, ctrl);
+
 		dma_unmap_single(dev->dev, le32_to_cpu(addr), len,
 				 DMA_TO_DEVICE);
 	}
@@ -128,7 +130,8 @@ mt76_dma_tx_cleanup_idx(struct mt76_dev *dev, struct mt76_queue *q, int idx,
 static void
 mt76_dma_sync_idx(struct mt76_dev *dev, struct mt76_queue *q)
 {
-	q->tail = q->head = ioread32(&q->regs->dma_idx);
+	q->head = ioread32(&q->regs->dma_idx);
+	q->tail = q->head;
 	iowrite32(q->head, &q->regs->cpu_idx);
 }
 
@@ -191,9 +194,9 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx,
 	void *buf = e->buf;
 	int buf_len = SKB_WITH_OVERHEAD(q->buf_size);
 
-	buf_addr = ACCESS_ONCE(desc->buf0);
+	buf_addr = READ_ONCE(desc->buf0);
 	if (len) {
-		u32 ctl = ACCESS_ONCE(desc->ctrl);
+		u32 ctl = READ_ONCE(desc->ctrl);
 		*len = FIELD_GET(MT_DMA_CTL_SD_LEN0, ctl);
 		*more = !(ctl & MT_DMA_CTL_LAST_SEC0);
 	}
@@ -361,7 +364,7 @@ mt76_dma_rx_process(struct mt76_dev *dev, struct mt76_queue *q, int budget)
 		}
 
 		if (q == &dev->q_rx[MT_RXQ_MCU]) {
-			u32 * rxfce = (u32 *) skb->cb;
+			u32 *rxfce = (u32 *) skb->cb;
 			*rxfce = info;
 		}
 
@@ -407,7 +410,8 @@ mt76_dma_init(struct mt76_dev *dev)
 	init_dummy_netdev(&dev->napi_dev);
 
 	for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++) {
-		netif_napi_add(&dev->napi_dev, &dev->napi[i], mt76_dma_rx_poll, 64);
+		netif_napi_add(&dev->napi_dev, &dev->napi[i], mt76_dma_rx_poll,
+			       64);
 		mt76_dma_rx_fill(dev, &dev->q_rx[i], false);
 		skb_queue_head_init(&dev->rx_skb[i]);
 		napi_enable(&dev->napi[i]);

eeprom.c

@@ -102,11 +102,10 @@ mt76_eeprom_override(struct mt76_dev *dev)
 
 	if (!is_valid_ether_addr(dev->macaddr)) {
 		eth_random_addr(dev->macaddr);
-		dev_printk(KERN_INFO, dev->dev,
+		dev_info(dev->dev,
 			 "Invalid MAC address, using random address %pM\n",
 			 dev->macaddr);
 	}
-
 }
 EXPORT_SYMBOL_GPL(mt76_eeprom_override);
 

mmio.c

@@ -40,7 +40,8 @@ static u32 mt76_mmio_rmw(struct mt76_dev *dev, u32 offset, u32 mask, u32 val)
 	return val;
 }
 
-static void mt76_mmio_copy(struct mt76_dev *dev, u32 offset, const void *data, int len)
+static void mt76_mmio_copy(struct mt76_dev *dev, u32 offset, const void *data,
+			   int len)
 {
 	__iowrite32_copy(dev->regs + offset, data, len >> 2);
 }

mt76.h

@@ -35,7 +35,8 @@ struct mt76_bus_ops {
 	u32 (*rr)(struct mt76_dev *dev, u32 offset);
 	void (*wr)(struct mt76_dev *dev, u32 offset, u32 val);
 	u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val);
-	void (*copy)(struct mt76_dev *dev, u32 offset, const void *data, int len);
+	void (*copy)(struct mt76_dev *dev, u32 offset, const void *data,
+		     int len);
 };
 
 enum mt76_txq_id {
@@ -114,7 +115,8 @@ struct mt76_queue_ops {
 
 	void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid);
 
-	void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid, bool flush);
+	void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid,
+			   bool flush);
 
 	void (*kick)(struct mt76_dev *dev, struct mt76_queue *q);
 };
@@ -318,6 +320,7 @@ static inline struct ieee80211_txq *
 mtxq_to_txq(struct mt76_txq *mtxq)
 {
 	void *ptr = mtxq;
+
 	return container_of(ptr, struct ieee80211_txq, drv_priv);
 }
 

tx.c

@@ -28,7 +28,8 @@ mt76_alloc_txwi(struct mt76_dev *dev)
 	if (!t)
 		return NULL;
 
-	addr = dma_map_single(dev->dev, &t->txwi, sizeof(t->txwi), DMA_TO_DEVICE);
+	addr = dma_map_single(dev->dev, &t->txwi, sizeof(t->txwi),
+			      DMA_TO_DEVICE);
 	t->dma_addr = addr;
 
 	return t;
@@ -135,7 +136,8 @@ int mt76_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
 		if (n == ARRAY_SIZE(buf))
 			goto unmap;
 
-		addr = dma_map_single(dev->dev, iter->data, iter->len, DMA_TO_DEVICE);
+		addr = dma_map_single(dev->dev, iter->data, iter->len,
+				      DMA_TO_DEVICE);
 		if (dma_mapping_error(dev->dev, addr))
 			goto unmap;
 
@@ -151,7 +153,8 @@ int mt76_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
 unmap:
 	ret = -ENOMEM;
 	for (n--; n > 0; n--)
-		dma_unmap_single(dev->dev, buf[n].addr, buf[n].len, DMA_TO_DEVICE);
+		dma_unmap_single(dev->dev, buf[n].addr, buf[n].len,
+				 DMA_TO_DEVICE);
 
 free:
 	e.skb = skb;

util.c

@@ -46,7 +46,7 @@ bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
 		if (cur == val)
 			return true;
 
-		msleep(10);
+		usleep_range(10000, 20000);
 	} while (timeout-- > 0);
 
 	return false;