mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 21:36:52 +00:00
move rx polling to core
Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
@@ -236,17 +236,6 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q)
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spin_unlock_bh(&q->lock);
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}
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static int
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mt76_dma_init(struct mt76_dev *dev)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++)
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mt76_dma_rx_fill(dev, &dev->q_rx[i], false);
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return 0;
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}
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static void
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mt76_add_fragment(struct mt76_dev *dev, struct mt76_queue *q, void *data,
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int len, bool more)
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@@ -272,7 +261,6 @@ mt76_dma_rx_process(struct mt76_dev *dev, struct mt76_queue *q, int budget)
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unsigned char *data;
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int len;
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int done = 0;
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bool napi = q == &dev->q_rx[MT_RXQ_MAIN];
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bool more;
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while (done < budget) {
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@@ -315,17 +303,50 @@ mt76_dma_rx_process(struct mt76_dev *dev, struct mt76_queue *q, int budget)
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dev->drv->rx_skb(dev, q - dev->q_rx, skb);
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}
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mt76_dma_rx_fill(dev, q, napi);
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mt76_dma_rx_fill(dev, q, true);
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return done;
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}
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static int
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mt76_dma_rx_poll(struct napi_struct *napi, int budget)
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{
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struct mt76_dev *dev;
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int qid, done;
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dev = container_of(napi->dev, struct mt76_dev, napi_dev);
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qid = napi - dev->napi;
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done = mt76_dma_rx_process(dev, &dev->q_rx[qid], budget);
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if (done < budget) {
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napi_complete(napi);
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dev->drv->rx_poll_complete(dev, qid);
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}
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return done;
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}
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static int
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mt76_dma_init(struct mt76_dev *dev)
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{
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int i;
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init_dummy_netdev(&dev->napi_dev);
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for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++) {
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netif_napi_add(&dev->napi_dev, &dev->napi[i], mt76_dma_rx_poll, 64);
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mt76_dma_rx_fill(dev, &dev->q_rx[i], false);
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napi_enable(&dev->napi[i]);
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}
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return 0;
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}
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static const struct mt76_queue_ops mt76_dma_ops = {
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.init = mt76_dma_init,
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.alloc = mt76_dma_alloc_queue,
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.add_buf = mt76_dma_add_buf,
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.tx_cleanup = mt76_dma_tx_cleanup,
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.kick = mt76_dma_kick_queue,
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.rx_process = mt76_dma_rx_process,
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};
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int mt76_dma_attach(struct mt76_dev *dev)
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@@ -352,7 +373,10 @@ void mt76_dma_cleanup(struct mt76_dev *dev)
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for (i = 0; i < ARRAY_SIZE(dev->q_tx); i++)
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mt76_dma_tx_cleanup(dev, &dev->q_tx[i], true,
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mt76_tx_cleanup_entry);
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for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++)
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for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++) {
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netif_napi_del(&dev->napi[i]);
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mt76_dma_rx_cleanup(dev, &dev->q_rx[i]);
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}
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}
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EXPORT_SYMBOL_GPL(mt76_dma_cleanup);
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@@ -105,8 +105,6 @@ struct mt76_queue_ops {
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void (*done)(struct mt76_dev *dev, struct mt76_queue *q,
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struct mt76_queue_entry *e));
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int (*rx_process)(struct mt76_dev *dev, struct mt76_queue *q, int budget);
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void (*kick)(struct mt76_dev *dev, struct mt76_queue *q);
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};
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@@ -159,6 +157,8 @@ struct mt76_driver_ops {
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void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q,
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struct sk_buff *skb);
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void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q);
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};
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struct mt76_dev {
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@@ -170,6 +170,9 @@ struct mt76_dev {
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void __iomem *regs;
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struct device *dev;
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struct net_device napi_dev;
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struct napi_struct napi[__MT_RXQ_MAX];
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struct list_head txwi_cache;
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struct mt76_queue q_tx[__MT_TXQ_MAX];
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struct mt76_queue q_rx[__MT_RXQ_MAX];
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@@ -234,7 +237,6 @@ static inline u16 mt76_rev(struct mt76_dev *dev)
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#define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__)
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#define mt76_queue_add_buf(dev, ...) (dev)->mt76.queue_ops->add_buf(&((dev)->mt76), __VA_ARGS__)
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#define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)
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#define mt76_queue_rx_process(dev, ...) (dev)->mt76.queue_ops->rx_process(&((dev)->mt76), __VA_ARGS__)
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#define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__)
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int mt76_register_device(struct mt76_dev *dev, bool vht,
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@@ -84,11 +84,7 @@ struct mt7603_dev {
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struct mt7603_mcu mcu;
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struct mt76_queue q_rx;
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struct net_device napi_dev;
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struct napi_struct napi;
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struct tasklet_struct tx_tasklet;
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struct tasklet_struct rx_tasklet;
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struct tasklet_struct pre_tbtt_tasklet;
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};
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@@ -145,5 +141,6 @@ int mt7603_mac_write_txwi(struct mt76_dev *mdev, void *txwi_ptr,
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void mt7603_queue_rx_skb(struct mt76_dev *dev, enum mt76_rxq_id q,
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struct sk_buff *skb);
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void mt7603_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q);
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#endif
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+8
-2
@@ -25,6 +25,12 @@ void mt7603_set_irq_mask(struct mt7603_dev *dev, u32 clear, u32 set)
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spin_unlock_irqrestore(&dev->irq_lock, flags);
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}
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void mt7603_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
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{
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struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
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mt7603_irq_enable(dev, MT_INT_RX_DONE(q));
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}
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irqreturn_t mt7603_irq_handler(int irq, void *dev_instance)
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{
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struct mt7603_dev *dev = dev_instance;
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@@ -45,12 +51,12 @@ irqreturn_t mt7603_irq_handler(int irq, void *dev_instance)
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if (intr & MT_INT_RX_DONE(0)) {
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mt7603_irq_disable(dev, MT_INT_RX_DONE(0));
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napi_schedule(&dev->napi);
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napi_schedule(&dev->mt76.napi[0]);
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}
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if (intr & MT_INT_RX_DONE(1)) {
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mt7603_irq_disable(dev, MT_INT_RX_DONE(1));
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tasklet_schedule(&dev->rx_tasklet);
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napi_schedule(&dev->mt76.napi[1]);
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}
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#if 0
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@@ -155,32 +155,6 @@ mt7603_tx_tasklet(unsigned long data)
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mt7603_irq_enable(dev, MT_INT_TX_DONE_ALL);
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}
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static int
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mt7603_dma_rx_poll(struct napi_struct *napi, int budget)
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{
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struct mt7603_dev *dev = container_of(napi, struct mt7603_dev, napi);
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int done;
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done = mt76_queue_rx_process(dev, &dev->mt76.q_rx[MT_RXQ_MAIN], budget);
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if (done < budget) {
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napi_complete(napi);
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mt7603_irq_enable(dev, MT_INT_RX_DONE(0));
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}
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return done;
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}
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static void
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mt7603_rx_tasklet(unsigned long data)
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{
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struct mt7603_dev *dev = (struct mt7603_dev *) data;
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struct mt76_queue *q = &dev->mt76.q_rx[MT_RXQ_MCU];
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mt76_queue_rx_process(dev, q, q->ndesc);
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mt7603_irq_enable(dev, MT_INT_RX_DONE(1));
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}
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int mt7603_dma_init(struct mt7603_dev *dev)
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{
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static const u8 wmm_queue_map[] = {
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@@ -197,12 +171,7 @@ int mt7603_dma_init(struct mt7603_dev *dev)
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init_waitqueue_head(&dev->mcu.wait);
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skb_queue_head_init(&dev->mcu.res_q);
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init_dummy_netdev(&dev->napi_dev);
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netif_napi_add(&dev->napi_dev, &dev->napi, mt7603_dma_rx_poll, 64);
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napi_enable(&dev->napi);
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tasklet_init(&dev->tx_tasklet, mt7603_tx_tasklet, (unsigned long) dev);
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tasklet_init(&dev->rx_tasklet, mt7603_rx_tasklet, (unsigned long) dev);
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mt76_clear(dev, MT_WPDMA_GLO_CFG,
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MT_WPDMA_GLO_CFG_TX_DMA_EN |
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@@ -261,6 +230,5 @@ void mt7603_dma_cleanup(struct mt7603_dev *dev)
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MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE);
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tasklet_kill(&dev->tx_tasklet);
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tasklet_kill(&dev->rx_tasklet);
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mt76_dma_cleanup(&dev->mt76);
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}
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@@ -22,6 +22,7 @@ struct mt7603_dev *mt7603_alloc_device(struct device *pdev)
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.fill_txwi = mt7603_mac_write_txwi,
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.tx_queue_skb = mt7603_tx_queue_skb,
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.rx_skb = mt7603_queue_rx_skb,
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.rx_poll_complete = mt7603_rx_poll_complete,
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};
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struct ieee80211_hw *hw;
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struct mt7603_dev *dev;
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@@ -105,11 +105,7 @@ struct mt76x2_dev {
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struct mt76x2_mcu mcu;
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struct sk_buff *rx_head;
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struct net_device napi_dev;
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struct napi_struct napi;
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struct tasklet_struct tx_tasklet;
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struct tasklet_struct rx_tasklet;
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struct tasklet_struct pre_tbtt_tasklet;
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struct delayed_work cal_work;
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struct delayed_work mac_work;
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@@ -227,6 +223,8 @@ void mt76x2_pre_tbtt_tasklet(unsigned long data);
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void mt76x2_txq_init(struct mt76x2_dev *dev, struct ieee80211_txq *txq);
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void mt76x2_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q);
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void mt76x2_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
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struct sk_buff *skb);
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+8
-2
@@ -36,6 +36,12 @@ void mt76x2_set_irq_mask(struct mt76x2_dev *dev, u32 clear, u32 set)
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spin_unlock_irqrestore(&dev->irq_lock, flags);
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}
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void mt76x2_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
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{
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struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
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mt76x2_irq_enable(dev, MT_INT_RX_DONE(q));
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}
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irqreturn_t mt76x2_irq_handler(int irq, void *dev_instance)
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{
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struct mt76x2_dev *dev = dev_instance;
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@@ -58,12 +64,12 @@ irqreturn_t mt76x2_irq_handler(int irq, void *dev_instance)
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if (intr & MT_INT_RX_DONE(0)) {
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mt76x2_irq_disable(dev, MT_INT_RX_DONE(0));
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napi_schedule(&dev->napi);
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napi_schedule(&dev->mt76.napi[0]);
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}
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if (intr & MT_INT_RX_DONE(1)) {
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mt76x2_irq_disable(dev, MT_INT_RX_DONE(1));
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tasklet_schedule(&dev->rx_tasklet);
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napi_schedule(&dev->mt76.napi[1]);
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}
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if (intr & MT_INT_PRE_TBTT)
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@@ -177,33 +177,6 @@ mt76x2_tx_tasklet(unsigned long data)
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mt76x2_irq_enable(dev, MT_INT_TX_DONE_ALL);
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}
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static int
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mt76x2_dma_rx_poll(struct napi_struct *napi, int budget)
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{
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struct mt76x2_dev *dev = container_of(napi, struct mt76x2_dev, napi);
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int done;
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done = mt76_queue_rx_process(dev, &dev->mt76.q_rx[MT_RXQ_MAIN], budget);
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if (done < budget) {
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napi_complete(napi);
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mt76x2_irq_enable(dev, MT_INT_RX_DONE(0));
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}
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return done;
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}
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static void
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mt76x2_rx_tasklet(unsigned long data)
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{
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struct mt76x2_dev *dev = (struct mt76x2_dev *) data;
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struct mt76_queue *q = &dev->mt76.q_rx[MT_RXQ_MCU];
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mt76_queue_rx_process(dev, q, q->ndesc);
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mt76x2_irq_enable(dev, MT_INT_RX_DONE(1));
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}
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int mt76x2_dma_init(struct mt76x2_dev *dev)
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{
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static const u8 wmm_queue_map[] = {
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@@ -225,11 +198,7 @@ int mt76x2_dma_init(struct mt76x2_dev *dev)
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init_waitqueue_head(&dev->mcu.wait);
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skb_queue_head_init(&dev->mcu.res_q);
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init_dummy_netdev(&dev->napi_dev);
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netif_napi_add(&dev->napi_dev, &dev->napi, mt76x2_dma_rx_poll, 64);
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tasklet_init(&dev->tx_tasklet, mt76x2_tx_tasklet, (unsigned long) dev);
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tasklet_init(&dev->rx_tasklet, mt76x2_rx_tasklet, (unsigned long) dev);
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mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
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@@ -268,6 +237,5 @@ int mt76x2_dma_init(struct mt76x2_dev *dev)
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void mt76x2_dma_cleanup(struct mt76x2_dev *dev)
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{
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tasklet_kill(&dev->tx_tasklet);
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tasklet_kill(&dev->rx_tasklet);
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mt76_dma_cleanup(&dev->mt76);
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}
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@@ -592,6 +592,7 @@ struct mt76x2_dev *mt76x2_alloc_device(struct device *pdev)
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.fill_txwi = mt76x2_mac_write_txwi,
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.tx_queue_skb = mt76x2_tx_queue_skb,
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.rx_skb = mt76x2_queue_rx_skb,
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.rx_poll_complete = mt76x2_rx_poll_complete,
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};
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struct ieee80211_hw *hw;
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struct mt76x2_dev *dev;
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@@ -31,7 +31,6 @@ mt76x2_start(struct ieee80211_hw *hw)
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ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mac_work,
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MT_CALIBRATE_INTERVAL);
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napi_enable(&dev->napi);
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set_bit(MT76_STATE_RUNNING, &dev->mt76.state);
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@@ -46,7 +45,6 @@ mt76x2_stop(struct ieee80211_hw *hw)
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struct mt76x2_dev *dev = hw->priv;
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mutex_lock(&dev->mutex);
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napi_disable(&dev->napi);
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clear_bit(MT76_STATE_RUNNING, &dev->mt76.state);
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mt76x2_stop_hardware(dev);
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mutex_unlock(&dev->mutex);
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