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phy: store rate tx power individually

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Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
Felix Fietkau
2015-07-28 15:01:48 +02:00
parent 1413f553f8
commit 902757f059
3 changed files with 36 additions and 31 deletions
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eeprom.c
+19 -19
View File
@@ -381,51 +381,51 @@ void mt76_get_rate_power(struct mt76_dev *dev, struct mt76_rate_power *t)
memset(t, 0, sizeof(*t));
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_CCK);
t->cck[0] = mt76_rate_power_val(val);
t->cck[1] = mt76_rate_power_val(val >> 8);
t->cck[0] = t->cck[1] = mt76_rate_power_val(val);
t->cck[2] = t->cck[3] = mt76_rate_power_val(val >> 8);
if (is_5ghz)
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_OFDM_5G_6M);
else
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_OFDM_2G_6M);
t->ofdm[0] = mt76_rate_power_val(val);
t->ofdm[1] = mt76_rate_power_val(val >> 8);
t->ofdm[0] = t->ofdm[1] = mt76_rate_power_val(val);
t->ofdm[2] = t->ofdm[3] = mt76_rate_power_val(val >> 8);
if (is_5ghz)
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_OFDM_2G_24M);
else
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_OFDM_5G_24M);
t->ofdm[2] = mt76_rate_power_val(val);
t->ofdm[3] = mt76_rate_power_val(val >> 8);
t->ofdm[4] = t->ofdm[5] = mt76_rate_power_val(val);
t->ofdm[6] = t->ofdm[7] = mt76_rate_power_val(val >> 8);
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS0);
t->ht[0] = mt76_rate_power_val(val);
t->ht[1] = mt76_rate_power_val(val >> 8);
t->ht[0] = t->ht[1] = mt76_rate_power_val(val);
t->ht[2] = t->ht[3] = mt76_rate_power_val(val >> 8);
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS4);
t->ht[2] = mt76_rate_power_val(val);
t->ht[3] = mt76_rate_power_val(val >> 8);
t->ht[4] = t->ht[5] = mt76_rate_power_val(val);
t->ht[6] = t->ht[7] = mt76_rate_power_val(val >> 8);
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS8);
t->ht[4] = mt76_rate_power_val(val);
t->ht[5] = mt76_rate_power_val(val >> 8);
t->ht[8] = t->ht[9] = mt76_rate_power_val(val);
t->ht[10] = t->ht[11] = mt76_rate_power_val(val >> 8);
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS12);
t->ht[6] = mt76_rate_power_val(val);
t->ht[7] = mt76_rate_power_val(val >> 8);
t->ht[12] = t->ht[13] = mt76_rate_power_val(val);
t->ht[14] = t->ht[15] = mt76_rate_power_val(val >> 8);
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_VHT_MCS0);
t->vht[0] = mt76_rate_power_val(val);
t->vht[1] = mt76_rate_power_val(val >> 8);
t->vht[0] = t->vht[1] = mt76_rate_power_val(val);
t->vht[2] = t->vht[3] = mt76_rate_power_val(val >> 8);
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_VHT_MCS4);
t->vht[2] = mt76_rate_power_val(val);
t->vht[3] = mt76_rate_power_val(val >> 8);
t->vht[4] = t->vht[5] = mt76_rate_power_val(val);
t->vht[6] = t->vht[7] = mt76_rate_power_val(val >> 8);
val = mt76_eeprom_get(dev, MT_EE_TX_POWER_VHT_MCS8);
if (!is_5ghz)
val >>= 8;
t->vht[4] = mt76_rate_power_val(val);
t->vht[8] = t->vht[9] = mt76_rate_power_val(val >> 8);
}
static void
eeprom.h
+9 -4
View File
@@ -107,10 +107,15 @@ enum mt76_cal_channel_group {
};
struct mt76_rate_power {
s8 cck[2];
s8 ofdm[4];
s8 ht[8];
s8 vht[5];
union {
struct {
s8 cck[4];
s8 ofdm[8];
s8 ht[16];
s8 vht[10];
};
s8 all[38];
};
};
struct mt76_tx_power_info {
phy.c
+8 -8
View File
@@ -104,21 +104,21 @@ static void mt76_apply_rate_power_table(struct mt76_dev *dev)
mt76_get_rate_power(dev, &t);
mt76_wr(dev, MT_TX_PWR_CFG_0,
mt76_tx_power_mask(t.cck[0], t.cck[1], t.ofdm[0], t.ofdm[1]));
mt76_tx_power_mask(t.cck[0], t.cck[2], t.ofdm[0], t.ofdm[2]));
mt76_wr(dev, MT_TX_PWR_CFG_1,
mt76_tx_power_mask(t.ofdm[2], t.ofdm[3], t.ht[0], t.ht[1]));
mt76_tx_power_mask(t.ofdm[4], t.ofdm[6], t.ht[0], t.ht[4]));
mt76_wr(dev, MT_TX_PWR_CFG_2,
mt76_tx_power_mask(t.ht[2], t.ht[3], t.ht[4], t.ht[5]));
mt76_tx_power_mask(t.ht[4], t.ht[6], t.ht[8], t.ht[10]));
mt76_wr(dev, MT_TX_PWR_CFG_3,
mt76_tx_power_mask(t.ht[6], t.ht[7], t.ht[0], t.ht[1]));
mt76_tx_power_mask(t.ht[12], t.ht[14], t.ht[0], t.ht[2]));
mt76_wr(dev, MT_TX_PWR_CFG_4,
mt76_tx_power_mask(t.ht[2], t.ht[3], 0, 0));
mt76_tx_power_mask(t.ht[4], t.ht[6], 0, 0));
mt76_wr(dev, MT_TX_PWR_CFG_7,
mt76_tx_power_mask(t.ofdm[2], t.vht[4], t.ht[3], t.vht[4]));
mt76_tx_power_mask(t.ofdm[4], t.vht[8], t.ht[6], t.vht[8]));
mt76_wr(dev, MT_TX_PWR_CFG_8,
mt76_tx_power_mask(t.ht[7], t.vht[4], t.vht[4], 0));
mt76_tx_power_mask(t.ht[14], t.vht[8], t.vht[8], 0));
mt76_wr(dev, MT_TX_PWR_CFG_9,
mt76_tx_power_mask(t.ht[3], t.vht[4], t.vht[4], 0));
mt76_tx_power_mask(t.ht[6], t.vht[8], t.vht[8], 0));
}
int mt76_phy_get_rssi(struct mt76_dev *dev, s8 rssi, int chain)