mt76: mt7915: only set int1 when using the second hif

Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
Felix Fietkau
2021-01-22 14:55:43 +01:00
parent 8dc5d4a0da
commit 8c796a3378
+8 -5
View File
@@ -103,11 +103,13 @@ static irqreturn_t mt7915_irq_handler(int irq, void *dev_instance)
intr &= dev->mt76.mmio.irqmask;
mt76_wr(dev, MT_INT_SOURCE_CSR, intr);
intr1 = mt76_rr(dev, MT_INT1_SOURCE_CSR);
intr1 &= dev->mt76.mmio.irqmask;
mt76_wr(dev, MT_INT1_SOURCE_CSR, intr1);
if (dev->hif2) {
intr1 = mt76_rr(dev, MT_INT1_SOURCE_CSR);
intr1 &= dev->mt76.mmio.irqmask;
mt76_wr(dev, MT_INT1_SOURCE_CSR, intr1);
intr |= intr1;
intr |= intr1;
}
if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
return IRQ_NONE;
@@ -162,6 +164,8 @@ static void mt7915_pci_init_hif2(struct mt7915_dev *dev)
dev->hif2 = hif;
mt76_wr(dev, MT_INT1_MASK_CSR, 0);
if (devm_request_irq(dev->mt76.dev, hif->irq, mt7915_irq_handler,
IRQF_SHARED, KBUILD_MODNAME "-hif", dev)) {
mt7915_put_hif2(hif);
@@ -245,7 +249,6 @@ static int mt7915_pci_probe(struct pci_dev *pdev,
dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev);
mt76_wr(dev, MT_INT_MASK_CSR, 0);
mt76_wr(dev, MT_INT1_MASK_CSR, 0);
/* master switch of PCIe tnterrupt enable */
mt7915_l1_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);