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mt7603: reset rx BA state on rx aggregation start

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Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
Felix Fietkau
2016-02-19 19:36:20 +01:00
parent 11787e548a
commit 583cb6eae3
4 changed files with 24 additions and 4 deletions
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mt7603.h
+1
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@@ -165,6 +165,7 @@ int mt7603_mac_fill_rx(struct mt7603_dev *dev, struct sk_buff *skb);
void mt7603_mac_add_txs(struct mt7603_dev *dev, void *data);
struct sk_buff *mt7603_mac_status_skb(struct mt7603_dev *dev,
struct mt7603_sta *sta, int pktid);
void mt7603_mac_rx_ba_reset(struct mt7603_dev *dev, void *addr, u8 tid);
int mt7603_mcu_set_channel(struct mt7603_dev *dev);
int mt7603_mcu_reg_read(struct mt7603_dev *dev, u32 reg, u32 *val, bool rf);
mt7603_mac.c
+9
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@@ -160,6 +160,15 @@ void mt7603_wtbl_update_cap(struct mt7603_dev *dev, struct ieee80211_sta *sta)
mt76_wr(dev, addr + 9 * 4, val);
}
void mt7603_mac_rx_ba_reset(struct mt7603_dev *dev, void *addr, u8 tid)
{
mt76_wr(dev, MT_BA_CONTROL_0, get_unaligned_le32(addr));
mt76_wr(dev, MT_BA_CONTROL_1,
(get_unaligned_le16(addr + 4) |
MT76_SET(MT_BA_CONTROL_1_TID, tid) |
MT_BA_CONTROL_1_RESET));
}
static int
mt7603_get_rate(struct mt7603_dev *dev, struct ieee80211_supported_band *sband,
int idx, bool cck)
mt7603_main.c
+2
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@@ -366,6 +366,7 @@ mt7603_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_ampdu_params *params)
{
enum ieee80211_ampdu_mlme_action action = params->action;
struct mt7603_dev *dev = hw->priv;
struct ieee80211_sta *sta = params->sta;
struct ieee80211_txq *txq = sta->txq[params->tid];
struct mt76_txq *mtxq = (struct mt76_txq *) txq->drv_priv;
@@ -377,6 +378,7 @@ mt7603_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
switch (action) {
case IEEE80211_AMPDU_RX_START:
mt7603_mac_rx_ba_reset(dev, sta->addr, tid);
break;
case IEEE80211_AMPDU_RX_STOP:
break;
mt7603_regs.h
+12 -4
View File
@@ -254,14 +254,22 @@
#define MT_WF_RFCR_DROP_NDPA BIT(20)
#define MT_WF_RFCR_DROP_UNWANTED_CTL BIT(21)
#define MT_BSSID0(idx) MT_WF_RMAC(0x04 + idx * 8)
#define MT_BSSID1(idx) MT_WF_RMAC(0x08 + idx * 8)
#define MT_BSSID0(idx) MT_WF_RMAC(0x004 + idx * 8)
#define MT_BSSID1(idx) MT_WF_RMAC(0x008 + idx * 8)
#define MT_MAC_ADDR0(idx) MT_WF_RMAC(0x24 + idx * 8)
#define MT_MAC_ADDR1(idx) MT_WF_RMAC(0x28 + idx * 8)
#define MT_MAC_ADDR0(idx) MT_WF_RMAC(0x024 + idx * 8)
#define MT_MAC_ADDR1(idx) MT_WF_RMAC(0x028 + idx * 8)
#define MT_MAC_ADDR1_ADDR GENMASK(15, 0)
#define MT_MAC_ADDR1_VALID BIT(16)
#define MT_BA_CONTROL_0 MT_WF_RMAC(0x068)
#define MT_BA_CONTROL_1 MT_WF_RMAC(0x06c)
#define MT_BA_CONTROL_1_ADDR GENMASK(15, 0)
#define MT_BA_CONTROL_1_TID GENMASK(19, 16)
#define MT_BA_CONTROL_1_IGNORE_TID BIT(20)
#define MT_BA_CONTROL_1_IGNORE_ALL BIT(21)
#define MT_BA_CONTROL_1_RESET BIT(22)
#define MT_WF_RMACDR MT_WF_RMAC(0x078)
#define MT_WF_RMACDR_TSF_PROBERSP_DIS BIT(0)
#define MT_WF_RMACDR_TSF_TIM BIT(4)