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mt76: rewrite dma descriptor base and ring size on queue reset

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Useful in case the hardware reset clobbers these values

Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
Felix Fietkau
2019-02-27 19:38:30 +01:00
parent fd315bd0f2
commit 3c6df9b75c
1 changed files with 2 additions and 0 deletions
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dma.c
+2
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@@ -130,6 +130,8 @@ mt76_dma_tx_cleanup_idx(struct mt76_dev *dev, struct mt76_queue *q, int idx,
static void
mt76_dma_sync_idx(struct mt76_dev *dev, struct mt76_queue *q)
{
iowrite32(q->desc_dma, &q->regs->desc_base);
iowrite32(q->ndesc, &q->regs->ring_size);
q->head = ioread32(&q->regs->dma_idx);
q->tail = q->head;
iowrite32(q->head, &q->regs->cpu_idx);