mt7603: control wtbl powersave mode flag in software

Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
Felix Fietkau
2016-02-27 13:16:35 +01:00
parent f470404876
commit 32645cebe0
4 changed files with 17 additions and 2 deletions
+1
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@@ -198,6 +198,7 @@ void mt7603_wtbl_update_cap(struct mt7603_dev *dev, struct ieee80211_sta *sta);
void mt7603_wtbl_set_rates(struct mt7603_dev *dev, struct mt7603_sta *sta);
int mt7603_wtbl_set_key(struct mt7603_dev *dev, int wcid,
struct ieee80211_key_conf *key);
void mt7603_wtbl_set_ps(struct mt7603_dev *dev, int idx, bool val);
int mt7603_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
struct sk_buff *skb, struct mt76_queue *q,
+11 -1
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@@ -131,6 +131,15 @@ void mt7603_wtbl_init(struct mt7603_dev *dev, int idx, const u8 *mac_addr)
mt76_wr(dev, addr + i, 0);
}
void mt7603_wtbl_set_ps(struct mt7603_dev *dev, int idx, bool val)
{
u32 addr = mt7603_wtbl1_addr(idx);
mt76_set(dev, MT_WTBL1_OR, MT_WTBL1_OR_PSM_WRITE);
mt76_rmw_field(dev, addr + 3 * 4, MT_WTBL1_W3_POWER_SAVE, val);
mt76_clear(dev, MT_WTBL1_OR, MT_WTBL1_OR_PSM_WRITE);
}
void mt7603_wtbl_clear(struct mt7603_dev *dev, int idx)
{
int wtbl2_frame_size = MT_PSE_PAGE_SIZE / MT_WTBL2_SIZE;
@@ -162,7 +171,8 @@ void mt7603_wtbl_clear(struct mt7603_dev *dev, int idx)
mt76_wr(dev, addr + 3 * 4,
MT76_SET(MT_WTBL1_W3_WTBL2_FRAME_ID, wtbl2_frame) |
MT76_SET(MT_WTBL1_W3_WTBL2_ENTRY_ID, wtbl2_entry) |
MT76_SET(MT_WTBL1_W3_WTBL4_FRAME_ID, wtbl4_frame));
MT76_SET(MT_WTBL1_W3_WTBL4_FRAME_ID, wtbl4_frame) |
MT_WTBL1_W3_I_PSM | MT_WTBL1_W3_KEEP_I_PSM);
mt76_wr(dev, addr + 4 * 4,
MT76_SET(MT_WTBL1_W4_WTBL3_FRAME_ID, wtbl3_frame) |
MT76_SET(MT_WTBL1_W4_WTBL3_ENTRY_ID, wtbl3_entry) |
+4
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@@ -295,12 +295,16 @@ mt7603_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
{
struct mt7603_dev *dev = hw->priv;
struct mt7603_sta *msta = (struct mt7603_sta *) sta->drv_priv;
int idx = msta->wcid.idx;
switch (cmd) {
case STA_NOTIFY_SLEEP:
mt7603_wtbl_set_ps(dev, idx, true);
mt76_stop_tx_queues(&dev->mt76, sta);
break;
case STA_NOTIFY_AWAKE:
mt7603_wtbl_set_ps(dev, idx, false);
break;
}
}
+1 -1
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@@ -538,7 +538,7 @@ enum {
#define MT_WTBL1_W3_WTBL2_ENTRY_ID GENMASK(15, 11)
#define MT_WTBL1_W3_WTBL4_FRAME_ID GENMASK(26, 16)
#define MT_WTBL1_W3_CHECK_PER BIT(27)
#define MT_WTBL1_W3_UPDATE_I_PSM BIT(28)
#define MT_WTBL1_W3_KEEP_I_PSM BIT(28)
#define MT_WTBL1_W3_I_PSM BIT(29)
#define MT_WTBL1_W3_POWER_SAVE BIT(30)
#define MT_WTBL1_W3_SKIP_TX BIT(31)