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mt7603: fix hw revision processing

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This commit is contained in:
Felix Fietkau
2015-12-07 16:46:56 +01:00
parent c8b144f2fc
commit 2d6e905554
2 changed files with 5 additions and 4 deletions
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mt7603_pci.c
+3 -2
View File
@@ -50,8 +50,9 @@ mt76pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
pci_set_drvdata(pdev, dev);
dev->rev = mt76_rr(dev, MT_ASIC_VERSION);
dev_printk(KERN_INFO, dev->mt76.dev, "ASIC revision: %08x\n", dev->rev);
dev->rev = (mt76_rr(dev, MT_HW_CHIPID) << 16) |
(mt76_rr(dev, MT_HW_REV) & 0xff);
dev_printk(KERN_INFO, dev->mt76.dev, "ASIC revision: %04x\n", dev->rev);
ret = devm_request_irq(dev->mt76.dev, pdev->irq, mt7603_irq_handler,
IRQF_SHARED, KBUILD_MODNAME, dev);
mt7603_regs.h
+2 -2
View File
@@ -14,6 +14,8 @@
#ifndef __MT7603_REGS_H
#define __MT7603_REGS_H
#define MT_HW_REV 0x1000
#define MT_HW_CHIPID 0x1008
#define MT_TOP_MISC2 0x1134
#define MT_MCU_BASE 0x2000
@@ -30,8 +32,6 @@
#define MT_HIF_BASE 0x4000
#define MT_HIF(ofs) (MT_HIF_BASE + (ofs))
#define MT_ASIC_VERSION MT_HIF(0x000)
#define MT_INT_SOURCE_CSR MT_HIF(0x200)
#define MT_INT_MASK_CSR MT_HIF(0x204)
#define MT_DELAY_INT_CFG MT_HIF(0x204)