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tx: mt76_txq_schedule() optimization

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Avoid to unnecessary call mt76_txq_schedule_list() if 4 (or more)
AGGR frames have been queued to the corresponding hw queue or
if the given hw queue is empty.
This patch let burst length to be more concentrated to max value
(i.e. 16) instead of 0

Signed-off-by: Lorenzo Bianconi <[email protected]>
This commit is contained in:
Lorenzo Bianconi
2015-08-26 16:35:51 +02:00
committed by Felix Fietkau
parent 319c0161ec
commit 0a47c463d2
1 changed files with 3 additions and 6 deletions
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tx.c
+3 -6
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@@ -359,12 +359,6 @@ mt76_txq_schedule_list(struct mt76_dev *dev, struct mt76_queue *hwq)
bool empty = false;
int cur;
if (hwq->swq_queued >= 4)
break;
if (list_empty(&hwq->swq))
break;
mtxq = list_first_entry(&hwq->swq, struct mt76_txq, list);
if (mtxq->send_bar) {
struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
@@ -400,6 +394,9 @@ void mt76_txq_schedule(struct mt76_dev *dev, struct mt76_queue *hwq)
int len;
do {
if (hwq->swq_queued >= 4 || list_empty(&hwq->swq))
break;
len = mt76_txq_schedule_list(dev, hwq);
} while (len > 0);
}