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mt76: mt7915: clean up and fix interrupt masking in the irq handler

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Only clear unmasked interrupts. If an interrupt is temporarily masked,
its pending events need to be processed later, even if another interrupt
happened in the mean time.

Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
Felix Fietkau
2020-08-07 22:07:50 +02:00
parent 58774b605f
commit 06f722d804
1 changed files with 11 additions and 14 deletions
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mt7915/pci.c
+11 -14
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@@ -29,9 +29,10 @@ mt7915_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
static irqreturn_t mt7915_irq_handler(int irq, void *dev_instance)
{
struct mt7915_dev *dev = dev_instance;
u32 intr;
u32 intr, mask;
intr = mt76_rr(dev, MT_INT_SOURCE_CSR);
intr &= dev->mt76.mmio.irqmask;
mt76_wr(dev, MT_INT_SOURCE_CSR, intr);
if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
@@ -39,27 +40,23 @@ static irqreturn_t mt7915_irq_handler(int irq, void *dev_instance)
trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);
intr &= dev->mt76.mmio.irqmask;
mask = intr & MT_INT_RX_DONE_ALL;
if (intr & MT_INT_TX_DONE_ALL)
mask |= MT_INT_TX_DONE_ALL;
if (intr & MT_INT_TX_DONE_ALL) {
mt7915_irq_disable(dev, MT_INT_TX_DONE_ALL);
mt7915_irq_disable(dev, mask);
if (intr & MT_INT_TX_DONE_ALL)
napi_schedule(&dev->mt76.tx_napi);
}
if (intr & MT_INT_RX_DONE_DATA) {
mt7915_irq_disable(dev, MT_INT_RX_DONE_DATA);
if (intr & MT_INT_RX_DONE_DATA)
napi_schedule(&dev->mt76.napi[0]);
}
if (intr & MT_INT_RX_DONE_WM) {
mt7915_irq_disable(dev, MT_INT_RX_DONE_WM);
if (intr & MT_INT_RX_DONE_WM)
napi_schedule(&dev->mt76.napi[1]);
}
if (intr & MT_INT_RX_DONE_WA) {
mt7915_irq_disable(dev, MT_INT_RX_DONE_WA);
if (intr & MT_INT_RX_DONE_WA)
napi_schedule(&dev->mt76.napi[2]);
}
if (intr & MT_INT_MCU_CMD) {
u32 val = mt76_rr(dev, MT_MCU_CMD);