mirror of
https://github.com/outbackdingo/mt76.git
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wifi: mt76: mt7996: Add NPU support for MT7990 chipset
Introduce support for MT7990 chipset in MT7996 npu configuration codebase. Tested-by: Kang Yang <[email protected]> Signed-off-by: Lorenzo Bianconi <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
committed by
Felix Fietkau
parent
cdb32a658b
commit
01575edfc3
@@ -30,6 +30,7 @@
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#define MT7996_RX_MCU_RING_SIZE 512
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#define MT7996_RX_MCU_RING_SIZE_WA 1024
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#define MT7996_NPU_TX_RING_SIZE 1024
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#define MT7996_NPU_RX_RING_SIZE 1024
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/* scatter-gather of mcu event is not supported in connac3 */
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#define MT7996_RX_MCU_BUF_SIZE (2048 + \
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SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
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+275
-31
@@ -17,21 +17,6 @@ static int mt7992_npu_txrx_offload_init(struct mt7996_dev *dev,
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int i, err;
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for (i = MT_BAND0; i < MT_BAND2; i++) {
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dma_addr = phy_addr;
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if (i)
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dma_addr += MT_RXQ_RING_BASE(MT_RXQ_RRO_BAND1) + 0x90 +
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hif1_ofs;
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else
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dma_addr += MT_RXQ_RING_BASE(MT_RXQ_RRO_BAND0) + 0x80;
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err = mt76_npu_send_msg(npu, i, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, i, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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@@ -84,6 +69,134 @@ static int mt7992_npu_txrx_offload_init(struct mt7996_dev *dev,
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return 0;
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}
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static int mt7996_npu_txrx_offload_init(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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u32 hif1_ofs = dev->hif2 ? MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0) : 0;
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phys_addr_t phy_addr = dev->mt76.mmio.phy_addr;
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u32 dma_addr;
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int err;
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/* npu rx rro ring0 */
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err = mt76_npu_send_msg(npu, 0, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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/* npu rx rro ring1 */
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err = mt76_npu_send_msg(npu, 2, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_NPU_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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/* msdu pg 2GHz */
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dma_addr = phy_addr + MT_RXQ_RING_BASE(MT_RXQ_MSDU_PAGE_BAND0) + 0xa0;
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err = mt76_npu_send_msg(npu, 5, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 5, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_NPU_RX_RING_SIZE / 4, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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/* msdu pg 5GHz */
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dma_addr = phy_addr + MT_RXQ_RING_BASE(MT_RXQ_MSDU_PAGE_BAND1) + 0xb0;
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err = mt76_npu_send_msg(npu, 6, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 6, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_NPU_RX_RING_SIZE / 2, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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/* msdu pg 6GHz */
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dma_addr = phy_addr + MT_RXQ_RING_BASE(MT_RXQ_MSDU_PAGE_BAND2) + 0xc0;
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err = mt76_npu_send_msg(npu, 7, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 7, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_NPU_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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/* ind cmd ring */
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err = mt76_npu_send_msg(npu, 8, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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phy_addr + MT_RXQ_RRO_IND_RING_BASE,
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GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 8, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 3, WLAN_FUNC_SET_WAIT_TX_RING_PCIE_ADDR,
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phy_addr + MT_RRO_ACK_SN_CTRL, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx desc addr\n");
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return err;
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}
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/* npu tx */
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dma_addr = phy_addr + MT_TXQ_RING_BASE(1) + 0x120;
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err = mt76_npu_send_msg(npu, 0, WLAN_FUNC_SET_WAIT_TX_RING_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx desc addr\n");
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return err;
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}
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dma_addr = phy_addr + MT_TXQ_RING_BASE(0) + 0x150 + hif1_ofs;
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err = mt76_npu_send_msg(npu, 2, WLAN_FUNC_SET_WAIT_TX_RING_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx desc addr\n");
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return err;
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}
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return 0;
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}
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static int mt7996_npu_offload_init(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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@@ -108,7 +221,11 @@ static int mt7996_npu_offload_init(struct mt7996_dev *dev,
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return err;
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}
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err = mt7992_npu_txrx_offload_init(dev, npu);
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if (is_mt7996(&dev->mt76))
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err = mt7996_npu_txrx_offload_init(dev, npu);
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else
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err = mt7992_npu_txrx_offload_init(dev, npu);
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if (err)
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return err;
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@@ -157,15 +274,84 @@ static int mt7992_npu_rxd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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return 0;
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}
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static int mt7996_npu_rxd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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{
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u32 val;
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int err;
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err = mt76_npu_get_msg(npu, 0, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan rx ring0 addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_BAND0].regs->desc_base);
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err = mt76_npu_get_msg(npu, 2, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan rx ring2 addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_BAND2].regs->desc_base);
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/* msdu pg ring */
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err = mt76_npu_get_msg(npu, 10, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan msdu pg ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_MSDU_PAGE_BAND0].regs->desc_base);
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err = mt76_npu_get_msg(npu, 11, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan msdu pg ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_MSDU_PAGE_BAND1].regs->desc_base);
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err = mt76_npu_get_msg(npu, 12, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan msdu pg ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_MSDU_PAGE_BAND2].regs->desc_base);
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/* ind_cmd ring */
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err = mt76_npu_get_msg(npu, 8, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan ind_cmd ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_IND].regs->desc_base);
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return 0;
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}
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static int mt7996_npu_txd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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{
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int i, err;
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const enum mt76_band_id band_list[] = {
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MT_BAND0,
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is_mt7996(&dev->mt76) ? MT_BAND2 : MT_BAND1,
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};
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int i;
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for (i = MT_BAND0; i < MT_BAND2; i++) {
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for (i = 0; i < ARRAY_SIZE(band_list); i++) {
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int err, band = band_list[i], phy_id;
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dma_addr_t dma_addr;
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u32 val;
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u32 val, size;
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err = mt76_npu_get_msg(npu, i + 5,
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err = mt76_npu_get_msg(npu, band + 5,
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WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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@@ -173,14 +359,20 @@ static int mt7996_npu_txd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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"failed retrieving NPU wlan tx ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.phys[i]->q_tx[0]->regs->desc_base);
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if (!dmam_alloc_coherent(dev->mt76.dma_dev,
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256 * MT7996_TX_RING_SIZE,
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phy_id = is_mt7996(&dev->mt76) ? band == MT_BAND0 ? 1 : 0
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: band;
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writel(val, &dev->mt76.phys[phy_id]->q_tx[0]->regs->desc_base);
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size = is_mt7996(&dev->mt76) ? band == MT_BAND2
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? MT7996_NPU_TX_RING_SIZE
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: MT7996_NPU_RX_RING_SIZE / 2
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: MT7996_TX_RING_SIZE;
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if (!dmam_alloc_coherent(dev->mt76.dma_dev, 256 * size,
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&dma_addr, GFP_KERNEL))
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return -ENOMEM;
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err = mt76_npu_send_msg(npu, i,
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err = mt76_npu_send_msg(npu, band,
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WLAN_FUNC_SET_WAIT_TX_BUF_SPACE_HW_BASE,
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dma_addr, GFP_KERNEL);
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if (err) {
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@@ -189,12 +381,11 @@ static int mt7996_npu_txd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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return err;
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}
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if (!dmam_alloc_coherent(dev->mt76.dma_dev,
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256 * MT7996_TX_RING_SIZE,
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if (!dmam_alloc_coherent(dev->mt76.dma_dev, 256 * size,
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&dma_addr, GFP_KERNEL))
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return -ENOMEM;
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err = mt76_npu_send_msg(npu, i + 5,
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err = mt76_npu_send_msg(npu, band + 5,
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WLAN_FUNC_SET_WAIT_TX_BUF_SPACE_HW_BASE,
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dma_addr, GFP_KERNEL);
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if (err) {
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@@ -207,7 +398,7 @@ static int mt7996_npu_txd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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&dma_addr, GFP_KERNEL))
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return -ENOMEM;
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err = mt76_npu_send_msg(npu, i + 10,
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err = mt76_npu_send_msg(npu, band + 10,
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WLAN_FUNC_SET_WAIT_TX_BUF_SPACE_HW_BASE,
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dma_addr, GFP_KERNEL);
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if (err) {
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@@ -223,8 +414,9 @@ static int mt7996_npu_txd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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static int mt7996_npu_rx_event_init(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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struct mt76_queue *q = &dev->mt76.q_rx[MT_RXQ_MAIN_WA];
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int qid = is_mt7996(&dev->mt76) ? MT_RXQ_TXFREE_BAND0 : MT_RXQ_MAIN_WA;
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phys_addr_t phy_addr = dev->mt76.mmio.phy_addr;
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struct mt76_queue *q = &dev->mt76.q_rx[qid];
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int err;
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err = mt76_npu_send_msg(npu, 0,
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@@ -244,7 +436,8 @@ static int mt7996_npu_rx_event_init(struct mt7996_dev *dev,
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return err;
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}
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phy_addr += MT_RXQ_RING_BASE(MT_RXQ_MAIN_WA) + 0x20;
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phy_addr += MT_RXQ_RING_BASE(qid);
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phy_addr += is_mt7996(&dev->mt76) ? 0x90 : 0x20;
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err = mt76_npu_send_msg(npu, 10, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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phy_addr, GFP_KERNEL);
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if (err)
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@@ -253,11 +446,54 @@ static int mt7996_npu_rx_event_init(struct mt7996_dev *dev,
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return err;
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}
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static int mt7996_npu_set_pcie_addr(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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u32 hif1_ofs = dev->hif2 ? MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0) : 0;
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dma_addr_t dma_addr = dev->mt76.mmio.phy_addr;
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int err;
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dma_addr += MT_RXQ_RING_BASE(MT_RXQ_RRO_BAND0) + 0x80;
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err = mt76_npu_send_msg(npu, 0, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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dma_addr = dev->mt76.mmio.phy_addr + hif1_ofs;
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if (is_mt7996(&dev->mt76)) {
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dma_addr += MT_RXQ_RING_BASE(MT_RXQ_RRO_BAND2) + 0x60;
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err = mt76_npu_send_msg(npu, 2, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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} else {
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dma_addr += MT_RXQ_RING_BASE(MT_RXQ_RRO_BAND1) + 0x90;
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err = mt76_npu_send_msg(npu, 1, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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}
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if (err)
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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static int mt7996_npu_tx_done_init(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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int err;
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/* rro ring cpu idx */
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err = mt76_npu_send_msg(npu, 15, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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0, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 2, WLAN_FUNC_SET_WAIT_INODE_TXRX_REG_ADDR,
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0, GFP_KERNEL);
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if (err) {
|
||||
@@ -304,7 +540,11 @@ int mt7996_npu_hw_init(struct mt7996_dev *dev)
|
||||
if (err)
|
||||
goto unlock;
|
||||
|
||||
err = mt7992_npu_rxd_init(dev, npu);
|
||||
if (is_mt7996(&dev->mt76))
|
||||
err = mt7996_npu_rxd_init(dev, npu);
|
||||
else
|
||||
err = mt7992_npu_rxd_init(dev, npu);
|
||||
|
||||
if (err)
|
||||
goto unlock;
|
||||
|
||||
@@ -316,6 +556,10 @@ int mt7996_npu_hw_init(struct mt7996_dev *dev)
|
||||
if (err)
|
||||
goto unlock;
|
||||
|
||||
err = mt7996_npu_set_pcie_addr(dev, npu);
|
||||
if (err)
|
||||
goto unlock;
|
||||
|
||||
err = mt7996_npu_tx_done_init(dev, npu);
|
||||
if (err)
|
||||
goto unlock;
|
||||
|
||||
Reference in New Issue
Block a user