mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 13:26:48 +00:00
Lorenzo BianconiandFelix Fietkau
647d11bb17
Introduce Airoha NPU support to MT7996 driver. NPU is used to enable traffic forward offloading between the MT76 NIC and the Airoha ethernet one available on the Airoha EN7581 SoC using Netfilter Flowtable APIs. Signed-off-by: Lorenzo Bianconi <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Felix Fietkau <[email protected]>
353 lines
8.0 KiB
C
353 lines
8.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2025 AIROHA Inc
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* Author: Lorenzo Bianconi <[email protected]>
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*/
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#include <linux/kernel.h>
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#include <linux/soc/airoha/airoha_offload.h>
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#include "mt7996.h"
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static int mt7996_npu_offload_init(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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phys_addr_t phy_addr = dev->mt76.mmio.phy_addr;
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u32 val, hif1_ofs = 0, dma_addr;
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int i, err;
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err = mt76_npu_get_msg(npu, 0, WLAN_FUNC_GET_WAIT_NPU_VERSION,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev, "failed getting NPU fw version\n");
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return err;
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}
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dev_info(dev->mt76.dev, "NPU version: %0d.%d\n",
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(val >> 16) & 0xffff, val & 0xffff);
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err = mt76_npu_send_msg(npu, 0, WLAN_FUNC_SET_WAIT_PCIE_PORT_TYPE,
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dev->mt76.mmio.npu_type, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe port type\n");
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return err;
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}
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if (dev->hif2)
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hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);
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for (i = MT_BAND0; i < MT_BAND2; i++) {
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dma_addr = phy_addr;
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if (i)
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dma_addr += MT_RXQ_RING_BASE(MT_RXQ_RRO_BAND1) + 0x90 +
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hif1_ofs;
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else
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dma_addr += MT_RXQ_RING_BASE(MT_RXQ_RRO_BAND0) + 0x80;
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err = mt76_npu_send_msg(npu, i, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, i, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc size\n");
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return err;
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}
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dma_addr = phy_addr;
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if (i)
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dma_addr += MT_TXQ_RING_BASE(0) + 0x150 + hif1_ofs;
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else
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dma_addr += MT_TXQ_RING_BASE(0) + 0x120;
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err = mt76_npu_send_msg(npu, i,
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WLAN_FUNC_SET_WAIT_TX_RING_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx desc addr\n");
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return err;
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}
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}
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err = mt76_npu_send_msg(npu, 9, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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phy_addr + MT_RXQ_RRO_AP_RING_BASE,
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GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rxdmad_c addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 9, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rxdmad_c desc size\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 2, WLAN_FUNC_SET_WAIT_TX_RING_PCIE_ADDR,
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phy_addr + MT_RRO_ACK_SN_CTRL, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rro_ack_sn desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 0, WLAN_FUNC_SET_WAIT_TOKEN_ID_SIZE,
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MT7996_HW_TOKEN_SIZE, GFP_KERNEL);
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if (err)
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return err;
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dev->mt76.token_start = MT7996_HW_TOKEN_SIZE;
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return 0;
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}
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static int mt7996_npu_rxd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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{
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u32 val;
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int err;
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err = mt76_npu_get_msg(npu, 0, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan rx ring0 addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_BAND0].regs->desc_base);
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err = mt76_npu_get_msg(npu, 1, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan rx ring1 addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_BAND1].regs->desc_base);
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err = mt76_npu_get_msg(npu, 9, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan rxdmad_c ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_RXDMAD_C].regs->desc_base);
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return 0;
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}
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static int mt7996_npu_txd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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{
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int i, err;
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for (i = MT_BAND0; i < MT_BAND2; i++) {
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dma_addr_t dma_addr;
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u32 val;
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err = mt76_npu_get_msg(npu, i + 5,
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WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan tx ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.phys[i]->q_tx[0]->regs->desc_base);
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if (!dmam_alloc_coherent(dev->mt76.dma_dev,
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256 * MT7996_TX_RING_SIZE,
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&dma_addr, GFP_KERNEL))
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return -ENOMEM;
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err = mt76_npu_send_msg(npu, i,
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WLAN_FUNC_SET_WAIT_TX_BUF_SPACE_HW_BASE,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan queue buf addr\n");
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return err;
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}
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if (!dmam_alloc_coherent(dev->mt76.dma_dev,
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256 * MT7996_TX_RING_SIZE,
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&dma_addr, GFP_KERNEL))
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return -ENOMEM;
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err = mt76_npu_send_msg(npu, i + 5,
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WLAN_FUNC_SET_WAIT_TX_BUF_SPACE_HW_BASE,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx buf addr\n");
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return err;
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}
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if (!dmam_alloc_coherent(dev->mt76.dma_dev, 256 * 1024,
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&dma_addr, GFP_KERNEL))
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return -ENOMEM;
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err = mt76_npu_send_msg(npu, i + 10,
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WLAN_FUNC_SET_WAIT_TX_BUF_SPACE_HW_BASE,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx buf base\n");
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return err;
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}
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}
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return 0;
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}
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static int mt7996_npu_rx_event_init(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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struct mt76_queue *q = &dev->mt76.q_rx[MT_RXQ_MAIN_WA];
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phys_addr_t phy_addr = dev->mt76.mmio.phy_addr;
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int err;
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err = mt76_npu_send_msg(npu, 0,
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WLAN_FUNC_SET_WAIT_RX_RING_FOR_TXDONE_HW_BASE,
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q->desc_dma, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx-done ring\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 10, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_RX_MCU_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan descriptors\n");
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return err;
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}
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phy_addr += MT_RXQ_RING_BASE(MT_RXQ_MAIN_WA) + 0x20;
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err = mt76_npu_send_msg(npu, 10, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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phy_addr, GFP_KERNEL);
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if (err)
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx pcie address\n");
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return err;
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}
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static int mt7996_npu_tx_done_init(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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int err;
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err = mt76_npu_send_msg(npu, 2, WLAN_FUNC_SET_WAIT_INODE_TXRX_REG_ADDR,
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0, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev, "failed setting NPU wlan txrx addr2\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 7, WLAN_FUNC_SET_WAIT_INODE_TXRX_REG_ADDR,
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0, GFP_KERNEL);
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if (err)
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dev_warn(dev->mt76.dev, "failed setting NPU wlan txrx addr7\n");
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return err;
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}
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int mt7996_npu_rx_queues_init(struct mt7996_dev *dev)
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{
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int err;
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if (!mt76_npu_device_active(&dev->mt76))
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return 0;
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err = mt76_npu_rx_queue_init(&dev->mt76,
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&dev->mt76.q_rx[MT_RXQ_NPU0]);
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if (err)
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return err;
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return mt76_npu_rx_queue_init(&dev->mt76,
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&dev->mt76.q_rx[MT_RXQ_NPU1]);
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}
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int mt7996_npu_hw_init(struct mt7996_dev *dev)
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{
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struct airoha_npu *npu;
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int i, err = 0;
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mutex_lock(&dev->mt76.mutex);
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npu = rcu_dereference_protected(dev->mt76.mmio.npu, &dev->mt76.mutex);
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if (!npu)
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goto unlock;
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err = mt7996_npu_offload_init(dev, npu);
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if (err)
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goto unlock;
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err = mt7996_npu_rxd_init(dev, npu);
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if (err)
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goto unlock;
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err = mt7996_npu_txd_init(dev, npu);
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if (err)
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goto unlock;
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err = mt7996_npu_rx_event_init(dev, npu);
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if (err)
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goto unlock;
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err = mt7996_npu_tx_done_init(dev, npu);
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if (err)
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goto unlock;
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for (i = MT_RXQ_NPU0; i <= MT_RXQ_NPU1; i++)
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airoha_npu_wlan_enable_irq(npu, i - MT_RXQ_NPU0);
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unlock:
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mutex_unlock(&dev->mt76.mutex);
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return err;
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}
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int mt7996_npu_hw_stop(struct mt7996_dev *dev)
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{
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struct airoha_npu *npu;
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int i, err;
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u32 info;
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npu = rcu_dereference_protected(dev->mt76.mmio.npu, &dev->mt76.mutex);
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if (!npu)
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return 0;
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err = mt76_npu_send_msg(npu, 4, WLAN_FUNC_SET_WAIT_INODE_TXRX_REG_ADDR,
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0, GFP_KERNEL);
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if (err)
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return err;
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for (i = 0; i < 10; i++) {
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err = mt76_npu_get_msg(npu, 3, WLAN_FUNC_GET_WAIT_NPU_INFO,
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&info, GFP_KERNEL);
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if (err)
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continue;
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if (info) {
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err = -ETIMEDOUT;
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continue;
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}
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}
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if (!err)
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err = mt76_npu_send_msg(npu, 6,
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WLAN_FUNC_SET_WAIT_INODE_TXRX_REG_ADDR,
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0, GFP_KERNEL);
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return err;
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}
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