mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 21:36:52 +00:00
Kristian EvensenandFelix Fietkau
2f40e4ad49
On some routers, the manufacturer has made a mistake and left the chip ID part of the EEPROM empty (it is set to 0x0000). One such router is the ZBT-WE1026-5G (equipped with MT7612), and the consequence is that the EEPROM check fails and the 5GHz wifi does not work at all. When setting the chip ID to 0x7612 manually, the 5GHz wifi works fine. When looking at EEPROM of the WE1026 (and other devices equipped with mt76x2), I see that the PCI ID is always set to a valid value (7612 or 7662). This PR works around the issue of an empty chip ID by using the PCI ID, if chip ID is 0. After applying this PR/patch manually to mt76, the 5GHz on the WE1026 works out of the box. Since the PCI ID is only used if chip ID is empty, devices with correct EEPROMs are not affected. Signed-off-by: Kristian Evensen <[email protected]>
183 lines
4.9 KiB
C
183 lines
4.9 KiB
C
/*
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* Copyright (C) 2016 Felix Fietkau <[email protected]>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __MT76x2_EEPROM_H
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#define __MT76x2_EEPROM_H
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#include "mt76x2.h"
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enum mt76x2_eeprom_field {
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MT_EE_CHIP_ID = 0x000,
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MT_EE_VERSION = 0x002,
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MT_EE_MAC_ADDR = 0x004,
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MT_EE_PCI_ID = 0x00A,
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MT_EE_NIC_CONF_0 = 0x034,
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MT_EE_NIC_CONF_1 = 0x036,
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MT_EE_NIC_CONF_2 = 0x042,
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MT_EE_XTAL_TRIM_1 = 0x03a,
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MT_EE_XTAL_TRIM_2 = 0x09e,
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MT_EE_LNA_GAIN = 0x044,
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MT_EE_RSSI_OFFSET_2G_0 = 0x046,
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MT_EE_RSSI_OFFSET_2G_1 = 0x048,
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MT_EE_RSSI_OFFSET_5G_0 = 0x04a,
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MT_EE_RSSI_OFFSET_5G_1 = 0x04c,
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MT_EE_TX_POWER_DELTA_BW40 = 0x050,
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MT_EE_TX_POWER_DELTA_BW80 = 0x052,
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MT_EE_TX_POWER_EXT_PA_5G = 0x054,
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MT_EE_TX_POWER_0_START_2G = 0x056,
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MT_EE_TX_POWER_1_START_2G = 0x05c,
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/* used as byte arrays */
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#define MT_TX_POWER_GROUP_SIZE_5G 5
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#define MT_TX_POWER_GROUPS_5G 6
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MT_EE_TX_POWER_0_START_5G = 0x062,
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MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA = 0x074,
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MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE = 0x076,
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MT_EE_TX_POWER_1_START_5G = 0x080,
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MT_EE_TX_POWER_CCK = 0x0a0,
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MT_EE_TX_POWER_OFDM_2G_6M = 0x0a2,
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MT_EE_TX_POWER_OFDM_2G_24M = 0x0a4,
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MT_EE_TX_POWER_OFDM_5G_6M = 0x0b2,
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MT_EE_TX_POWER_OFDM_5G_24M = 0x0b4,
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MT_EE_TX_POWER_HT_MCS0 = 0x0a6,
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MT_EE_TX_POWER_HT_MCS4 = 0x0a8,
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MT_EE_TX_POWER_HT_MCS8 = 0x0aa,
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MT_EE_TX_POWER_HT_MCS12 = 0x0ac,
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MT_EE_TX_POWER_VHT_MCS0 = 0x0ba,
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MT_EE_TX_POWER_VHT_MCS4 = 0x0bc,
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MT_EE_TX_POWER_VHT_MCS8 = 0x0be,
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MT_EE_RF_TEMP_COMP_SLOPE_5G = 0x0f2,
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MT_EE_RF_TEMP_COMP_SLOPE_2G = 0x0f4,
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MT_EE_RF_2G_TSSI_OFF_TXPOWER = 0x0f6,
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MT_EE_RF_2G_RX_HIGH_GAIN = 0x0f8,
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MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN = 0x0fa,
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MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN = 0x0fc,
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MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN = 0x0fe,
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MT_EE_BT_RCAL_RESULT = 0x138,
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MT_EE_BT_VCDL_CALIBRATION = 0x13c,
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MT_EE_BT_PMUCFG = 0x13e,
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__MT_EE_MAX
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};
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#define MT_EE_NIC_CONF_0_PA_INT_2G BIT(8)
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#define MT_EE_NIC_CONF_0_PA_INT_5G BIT(9)
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#define MT_EE_NIC_CONF_0_BOARD_TYPE GENMASK(13, 12)
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#define MT_EE_NIC_CONF_1_TEMP_TX_ALC BIT(1)
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#define MT_EE_NIC_CONF_1_LNA_EXT_2G BIT(2)
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#define MT_EE_NIC_CONF_1_LNA_EXT_5G BIT(3)
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#define MT_EE_NIC_CONF_1_TX_ALC_EN BIT(13)
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#define MT_EE_NIC_CONF_2_RX_STREAM GENMASK(3, 0)
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#define MT_EE_NIC_CONF_2_TX_STREAM GENMASK(7, 4)
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#define MT_EE_NIC_CONF_2_HW_ANTDIV BIT(8)
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#define MT_EE_NIC_CONF_2_XTAL_OPTION GENMASK(10, 9)
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#define MT_EE_NIC_CONF_2_TEMP_DISABLE BIT(11)
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#define MT_EE_NIC_CONF_2_COEX_METHOD GENMASK(15, 13)
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enum mt76x2_board_type {
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BOARD_TYPE_2GHZ = 1,
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BOARD_TYPE_5GHZ = 2,
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};
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enum mt76x2_cal_channel_group {
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MT_CH_5G_JAPAN,
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MT_CH_5G_UNII_1,
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MT_CH_5G_UNII_2,
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MT_CH_5G_UNII_2E_1,
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MT_CH_5G_UNII_2E_2,
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MT_CH_5G_UNII_3,
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__MT_CH_MAX
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};
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struct mt76x2_tx_power_info {
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u8 target_power;
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s8 delta_bw40;
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s8 delta_bw80;
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struct {
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s8 tssi_slope;
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s8 tssi_offset;
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s8 target_power;
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s8 delta;
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} chain[MT_MAX_CHAINS];
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};
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struct mt76x2_temp_comp {
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u8 temp_25_ref;
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int lower_bound; /* J */
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int upper_bound; /* J */
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unsigned int high_slope; /* J / dB */
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unsigned int low_slope; /* J / dB */
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};
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static inline int
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mt76x2_eeprom_get(struct mt76x2_dev *dev, enum mt76x2_eeprom_field field)
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{
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if ((field & 1) || field >= __MT_EE_MAX)
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return -1;
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return get_unaligned_le16(dev->mt76.eeprom.data + field);
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}
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void mt76x2_get_rate_power(struct mt76x2_dev *dev, struct mt76_rate_power *t);
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void mt76x2_get_power_info(struct mt76x2_dev *dev,
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struct mt76x2_tx_power_info *t);
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int mt76x2_get_temp_comp(struct mt76x2_dev *dev, struct mt76x2_temp_comp *t);
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bool mt76x2_ext_pa_enabled(struct mt76x2_dev *dev, enum nl80211_band band);
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void mt76x2_read_rx_gain(struct mt76x2_dev *dev);
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static inline bool
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mt76x2_temp_tx_alc_enabled(struct mt76x2_dev *dev)
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{
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return mt76x2_eeprom_get(dev, MT_EE_NIC_CONF_1) &
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MT_EE_NIC_CONF_1_TEMP_TX_ALC;
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}
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static inline bool
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mt76x2_tssi_enabled(struct mt76x2_dev *dev)
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{
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return !mt76x2_temp_tx_alc_enabled(dev) &&
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(mt76x2_eeprom_get(dev, MT_EE_NIC_CONF_1) &
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MT_EE_NIC_CONF_1_TX_ALC_EN);
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}
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static inline bool
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mt76x2_has_ext_lna(struct mt76x2_dev *dev)
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{
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u32 val = mt76x2_eeprom_get(dev, MT_EE_NIC_CONF_1);
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if (dev->mt76.chandef.chan->band == NL80211_BAND_2GHZ)
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return val & MT_EE_NIC_CONF_1_LNA_EXT_2G;
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else
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return val & MT_EE_NIC_CONF_1_LNA_EXT_5G;
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}
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#endif
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