mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 21:36:52 +00:00
Instead of read tx status from mac table, add new mechanisam to hanele tx done event for data frame, every 250ms This event indicate the real tx status of this pkt in mac layer and would help mac80211 correct status more frequently Signed-off-by: Deren Wu <[email protected]> Signed-off-by: Felix Fietkau <[email protected]>
439 lines
7.3 KiB
C
439 lines
7.3 KiB
C
/* SPDX-License-Identifier: ISC */
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/* Copyright (C) 2020 MediaTek Inc. */
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#ifndef __MT7921_MCU_H
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#define __MT7921_MCU_H
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#include "../mt76_connac_mcu.h"
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struct mt7921_mcu_txd {
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__le32 txd[8];
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__le16 len;
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__le16 pq_id;
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u8 cid;
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u8 pkt_type;
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u8 set_query; /* FW don't care */
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u8 seq;
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u8 uc_d2b0_rev;
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u8 ext_cid;
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u8 s2d_index;
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u8 ext_cid_ack;
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u32 reserved[5];
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} __packed __aligned(4);
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/**
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* struct mt7921_uni_txd - mcu command descriptor for firmware v3
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* @txd: hardware descriptor
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* @len: total length not including txd
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* @cid: command identifier
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* @pkt_type: must be 0xa0 (cmd packet by long format)
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* @frag_n: fragment number
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* @seq: sequence number
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* @checksum: 0 mean there is no checksum
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* @s2d_index: index for command source and destination
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* Definition | value | note
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* CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM
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* CMD_S2D_IDX_C2N | 0x01 | command from WA to WM
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* CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA
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* CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM
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*
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* @option: command option
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* BIT[0]: UNI_CMD_OPT_BIT_ACK
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* set to 1 to request a fw reply
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* if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY
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* is set, mcu firmware will send response event EID = 0x01
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* (UNI_EVENT_ID_CMD_RESULT) to the host.
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* BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD
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* 0: original command
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* 1: unified command
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* BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY
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* 0: QUERY command
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* 1: SET command
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*/
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struct mt7921_uni_txd {
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__le32 txd[8];
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/* DW1 */
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__le16 len;
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__le16 cid;
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/* DW2 */
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u8 reserved;
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u8 pkt_type;
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u8 frag_n;
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u8 seq;
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/* DW3 */
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__le16 checksum;
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u8 s2d_index;
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u8 option;
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/* DW4 */
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u8 reserved2[4];
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} __packed __aligned(4);
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/* event table */
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enum {
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MCU_EVENT_REG_ACCESS = 0x05,
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MCU_EVENT_LP_INFO = 0x07,
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MCU_EVENT_SCAN_DONE = 0x0d,
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MCU_EVENT_TX_DONE = 0x0f,
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MCU_EVENT_BSS_ABSENCE = 0x11,
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MCU_EVENT_BSS_BEACON_LOSS = 0x13,
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MCU_EVENT_CH_PRIVILEGE = 0x18,
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MCU_EVENT_SCHED_SCAN_DONE = 0x23,
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MCU_EVENT_DBG_MSG = 0x27,
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MCU_EVENT_TXPWR = 0xd0,
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MCU_EVENT_COREDUMP = 0xf0,
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};
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/* ext event table */
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enum {
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MCU_EXT_EVENT_RATE_REPORT = 0x87,
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};
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struct mt7921_mcu_rxd {
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__le32 rxd[6];
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__le16 len;
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__le16 pkt_type_id;
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u8 eid;
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u8 seq;
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__le16 __rsv;
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u8 ext_eid;
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u8 __rsv1[2];
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u8 s2d_index;
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};
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struct mt7921_mcu_eeprom_info {
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__le32 addr;
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__le32 valid;
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u8 data[16];
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} __packed;
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#define MT_RA_RATE_NSS GENMASK(8, 6)
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#define MT_RA_RATE_MCS GENMASK(3, 0)
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#define MT_RA_RATE_TX_MODE GENMASK(12, 9)
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#define MT_RA_RATE_DCM_EN BIT(4)
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#define MT_RA_RATE_BW GENMASK(14, 13)
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#define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10))
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#define MCU_PKT_ID 0xa0
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enum {
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MCU_Q_QUERY,
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MCU_Q_SET,
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MCU_Q_RESERVED,
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MCU_Q_NA
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};
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enum {
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MCU_S2D_H2N,
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MCU_S2D_C2N,
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MCU_S2D_H2C,
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MCU_S2D_H2CN
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};
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struct mt7921_mcu_uni_event {
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u8 cid;
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u8 pad[3];
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__le32 status; /* 0: success, others: fail */
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} __packed;
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enum {
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PATCH_NOT_DL_SEM_FAIL,
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PATCH_IS_DL,
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PATCH_NOT_DL_SEM_SUCCESS,
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PATCH_REL_SEM_SUCCESS
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};
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enum {
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FW_STATE_INITIAL,
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FW_STATE_FW_DOWNLOAD,
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FW_STATE_NORMAL_OPERATION,
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FW_STATE_NORMAL_TRX,
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FW_STATE_WACPU_RDY = 7
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};
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enum {
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EE_MODE_EFUSE,
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EE_MODE_BUFFER,
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};
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enum {
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EE_FORMAT_BIN,
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EE_FORMAT_WHOLE,
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EE_FORMAT_MULTIPLE,
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};
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enum {
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MCU_PHY_STATE_TX_RATE,
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MCU_PHY_STATE_RX_RATE,
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MCU_PHY_STATE_RSSI,
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MCU_PHY_STATE_CONTENTION_RX_RATE,
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MCU_PHY_STATE_OFDMLQ_CNINFO,
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};
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struct sec_key {
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u8 cipher_id;
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u8 cipher_len;
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u8 key_id;
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u8 key_len;
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u8 key[32];
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} __packed;
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struct sta_rec_sec {
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__le16 tag;
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__le16 len;
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u8 add;
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u8 n_cipher;
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u8 rsv[2];
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struct sec_key key[2];
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} __packed;
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enum mt7921_cipher_type {
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MT_CIPHER_NONE,
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MT_CIPHER_WEP40,
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MT_CIPHER_WEP104,
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MT_CIPHER_WEP128,
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MT_CIPHER_TKIP,
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MT_CIPHER_AES_CCMP,
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MT_CIPHER_CCMP_256,
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MT_CIPHER_GCMP,
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MT_CIPHER_GCMP_256,
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MT_CIPHER_WAPI,
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MT_CIPHER_BIP_CMAC_128,
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};
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enum {
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CH_SWITCH_NORMAL = 0,
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CH_SWITCH_SCAN = 3,
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CH_SWITCH_MCC = 4,
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CH_SWITCH_DFS = 5,
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CH_SWITCH_BACKGROUND_SCAN_START = 6,
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CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7,
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CH_SWITCH_BACKGROUND_SCAN_STOP = 8,
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CH_SWITCH_SCAN_BYPASS_DPD = 9
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};
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enum {
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THERMAL_SENSOR_TEMP_QUERY,
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THERMAL_SENSOR_MANUAL_CTRL,
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THERMAL_SENSOR_INFO_QUERY,
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THERMAL_SENSOR_TASK_CTRL,
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};
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enum {
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MT_EBF = BIT(0), /* explicit beamforming */
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MT_IBF = BIT(1) /* implicit beamforming */
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};
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#define STA_CAP_WMM BIT(0)
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#define STA_CAP_SGI_20 BIT(4)
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#define STA_CAP_SGI_40 BIT(5)
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#define STA_CAP_TX_STBC BIT(6)
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#define STA_CAP_RX_STBC BIT(7)
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#define STA_CAP_VHT_SGI_80 BIT(16)
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#define STA_CAP_VHT_SGI_160 BIT(17)
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#define STA_CAP_VHT_TX_STBC BIT(18)
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#define STA_CAP_VHT_RX_STBC BIT(19)
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#define STA_CAP_VHT_LDPC BIT(23)
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#define STA_CAP_LDPC BIT(24)
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#define STA_CAP_HT BIT(26)
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#define STA_CAP_VHT BIT(27)
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#define STA_CAP_HE BIT(28)
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struct mt7921_mcu_reg_event {
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__le32 reg;
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__le32 val;
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} __packed;
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struct mt7921_mcu_tx_config {
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u8 peer_addr[ETH_ALEN];
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u8 sw;
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u8 dis_rx_hdr_tran;
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u8 aad_om;
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u8 pfmu_idx;
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__le16 partial_aid;
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u8 ibf;
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u8 ebf;
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u8 is_ht;
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u8 is_vht;
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u8 mesh;
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u8 baf_en;
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u8 cf_ack;
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u8 rdg_ba;
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u8 rdg;
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u8 pm;
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u8 rts;
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u8 smps;
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u8 txop_ps;
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u8 not_update_ipsm;
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u8 skip_tx;
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u8 ldpc;
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u8 qos;
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u8 from_ds;
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u8 to_ds;
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u8 dyn_bw;
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u8 amdsu_cross_lg;
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u8 check_per;
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u8 gid_63;
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u8 he;
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u8 vht_ibf;
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u8 vht_ebf;
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u8 vht_ldpc;
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u8 he_ldpc;
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} __packed;
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struct mt7921_mcu_sec_config {
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u8 wpi_flag;
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u8 rv;
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u8 ikv;
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u8 rkv;
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u8 rcid;
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u8 rca1;
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u8 rca2;
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u8 even_pn;
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u8 key_id;
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u8 muar_idx;
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u8 cipher_suit;
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u8 rsv[1];
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} __packed;
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struct mt7921_mcu_key_config {
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u8 key[32];
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} __packed;
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struct mt7921_mcu_rate_info {
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u8 mpdu_fail;
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u8 mpdu_tx;
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u8 rate_idx;
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u8 rsv[1];
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__le16 rate[8];
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} __packed;
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struct mt7921_mcu_ba_config {
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u8 ba_en;
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u8 rsv[3];
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__le32 ba_winsize;
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} __packed;
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struct mt7921_mcu_ant_id_config {
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u8 ant_id[4];
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} __packed;
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struct mt7921_mcu_peer_cap {
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struct mt7921_mcu_ant_id_config ant_id_config;
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u8 power_offset;
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u8 bw_selector;
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u8 change_bw_rate_n;
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u8 bw;
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u8 spe_idx;
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u8 g2;
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u8 g4;
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u8 g8;
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u8 g16;
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u8 mmss;
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u8 ampdu_factor;
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u8 rsv[1];
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} __packed;
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struct mt7921_mcu_rx_cnt {
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u8 rx_rcpi[4];
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u8 rx_cc[4];
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u8 rx_cc_sel;
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u8 ce_rmsd;
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u8 rsv[2];
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} __packed;
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struct mt7921_mcu_tx_cnt {
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__le16 rate1_cnt;
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__le16 rate1_fail_cnt;
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__le16 rate2_cnt;
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__le16 rate3_cnt;
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__le16 cur_bw_tx_cnt;
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__le16 cur_bw_tx_fail_cnt;
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__le16 other_bw_tx_cnt;
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__le16 other_bw_tx_fail_cnt;
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} __packed;
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struct mt7921_mcu_wlan_info_event {
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struct mt7921_mcu_tx_config tx_config;
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struct mt7921_mcu_sec_config sec_config;
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struct mt7921_mcu_key_config key_config;
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struct mt7921_mcu_rate_info rate_info;
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struct mt7921_mcu_ba_config ba_config;
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struct mt7921_mcu_peer_cap peer_cap;
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struct mt7921_mcu_rx_cnt rx_cnt;
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struct mt7921_mcu_tx_cnt tx_cnt;
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} __packed;
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struct mt7921_mcu_wlan_info {
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__le32 wlan_idx;
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struct mt7921_mcu_wlan_info_event event;
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} __packed;
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struct mt7921_txpwr_req {
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u8 ver;
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u8 action;
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__le16 len;
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u8 dbdc_idx;
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u8 rsv[3];
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} __packed;
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struct mt7921_txpwr_event {
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u8 ver;
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u8 action;
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__le16 len;
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struct mt7921_txpwr txpwr;
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} __packed;
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struct mt7921_mcu_tx_done_event {
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u8 pid;
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u8 status;
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u16 seq;
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u8 wlan_idx;
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u8 tx_cnt;
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u16 tx_rate;
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u8 flag;
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u8 tid;
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u8 rsp_rate;
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u8 mcs;
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u8 bw;
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u8 tx_pwr;
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u8 reason;
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u8 rsv0[1];
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u32 delay;
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u32 timestamp;
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u32 applied_flag;
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u8 txs[28];
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u8 rsv1[32];
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} __packed;
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#endif
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