mirror of
https://github.com/outbackdingo/mt76.git
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82 lines
2.1 KiB
C
82 lines
2.1 KiB
C
/*
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* Copyright (C) 2016 Felix Fietkau <[email protected]>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "mt7603.h"
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void mt7603_set_irq_mask(struct mt7603_dev *dev, u32 clear, u32 set)
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{
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unsigned long flags;
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spin_lock_irqsave(&dev->irq_lock, flags);
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dev->irqmask &= ~clear;
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dev->irqmask |= set;
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mt76_wr(dev, MT_INT_MASK_CSR, dev->irqmask);
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spin_unlock_irqrestore(&dev->irq_lock, flags);
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}
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void mt7603_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
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{
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struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
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mt7603_irq_enable(dev, MT_INT_RX_DONE(q));
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}
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irqreturn_t mt7603_irq_handler(int irq, void *dev_instance)
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{
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struct mt7603_dev *dev = dev_instance;
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u32 intr;
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intr = mt76_rr(dev, MT_INT_SOURCE_CSR);
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mt76_wr(dev, MT_INT_SOURCE_CSR, intr);
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if (!test_bit(MT76_STATE_INITIALIZED, &dev->mt76.state))
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return IRQ_NONE;
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intr &= dev->irqmask;
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if (intr & MT_INT_MAC_IRQ3) {
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u32 hwintr = mt76_rr(dev, MT_HW_INT_STATUS(3));
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mt76_wr(dev, MT_HW_INT_STATUS(3), hwintr);
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if (hwintr & MT_HW_INT3_PRE_TBTT0)
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tasklet_schedule(&dev->pre_tbtt_tasklet);
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if (hwintr & MT_HW_INT3_TBTT0)
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mt7603_tbtt(dev);
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}
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if (intr & MT_INT_TX_DONE_ALL) {
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mt7603_irq_disable(dev, MT_INT_TX_DONE_ALL);
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tasklet_schedule(&dev->tx_tasklet);
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}
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if (intr & MT_INT_RX_DONE(0)) {
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mt7603_irq_disable(dev, MT_INT_RX_DONE(0));
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napi_schedule(&dev->mt76.napi[0]);
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}
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if (intr & MT_INT_RX_DONE(1)) {
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mt7603_irq_disable(dev, MT_INT_RX_DONE(1));
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napi_schedule(&dev->mt76.napi[1]);
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}
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return IRQ_HANDLED;
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}
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u32 mt7603_reg_map(struct mt7603_dev *dev, u32 addr)
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{
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u32 base = addr & GENMASK(31, 19);
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u32 offset = addr & GENMASK(18, 0);
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mt76_wr(dev, MT_MCU_PCIE_REMAP_2, base);
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return MT_PCIE_REMAP_BASE_2 + offset;
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}
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