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https://github.com/outbackdingo/mt76.git
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Fix following crash that occurs when the driver is processing rx packets while the device is not initialized yet $ rmmod mt7615e [ 67.210261] mt7615e 0000:01:00.0: Message -239 (seq 2) timeout $ modprobe mt7615e [ 72.406937] bus=0x1, slot = 0x0, irq=0x16 [ 72.436590] CPU 0 Unable to handle kernel paging request at virtual address 00000004, epc == 8eec4240, ra == 8eec41e0 [ 72.450291] mt7615e 0000:01:00.0: Firmware is not ready for download [ 72.457724] Oops[#1]: [ 72.470494] mt7615e: probe of 0000:01:00.0 failed with error -5 [ 72.474829] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.14.114 #0 [ 72.498702] task: 805769e0 task.stack: 80564000 [ 72.507709] $ 0 : 00000000 00000001 00000000 00000001 [ 72.518106] $ 4 : 8f704dbc 00000000 00000000 8f7046c0 [ 72.528500] $ 8 : 00000024 8045e98c 81210008 11000000 [ 72.538895] $12 : 8fc09f60 00000008 00000019 00000033 [ 72.549289] $16 : 8f704d80 e00000ff 8f0c7800 3c182406 [ 72.559684] $20 : 00000006 8ee615a0 4e000108 00000000 [ 72.570078] $24 : 0000004c 8000cf94 [ 72.580474] $28 : 80564000 8fc09e38 00000001 8eec41e0 [ 72.590869] Hi : 00000001 [ 72.596582] Lo : 00000000 [ 72.602319] epc : 8eec4240 mt7615_mac_fill_rx+0xac/0x494 [mt7615e] [ 72.614953] ra : 8eec41e0 mt7615_mac_fill_rx+0x4c/0x494 [mt7615e] [ 72.627580] Status: 11008403 KERNEL EXL IE [ 72.635899] Cause : 40800008 (ExcCode 02) [ 72.643860] BadVA : 00000004 [ 72.649573] PrId : 0001992f (MIPS 1004Kc) [ 72.657704] Modules linked in: mt7615e pppoe ppp_async pppox ppp_generic nf_conntrack_ipv6 mt76x2e mt76x2_common mt76x02_lib mt7603e mt76 mac80211 iptable_nat ipt_REJECT ipt_MASQUERADE cfg80211 xt_time xt_tcpudp xt_state xt_nat xt_mu] [ 72.792717] Process swapper/0 (pid: 0, threadinfo=80564000, task=805769e0, tls=00000000) [ 72.808799] Stack : 8f0c7800 00000800 8f0c7800 8032b874 00000000 40000000 8f704d80 8ee615a0 [ 72.825428] 8dc88010 00000001 8ee615e0 8eec09b0 8dc88010 8032b914 8f3aee80 80567d20 [ 72.842055] 00000000 8ee615e0 40000000 8f0c7800 00000108 8eec9944 00000000 00000000 [ 72.858682] 80508f10 80510000 00000001 80567d20 8ee615a0 00000000 00000000 8ee61c00 [ 72.875308] 8ee61c40 00000040 80610000 80580000 00000000 8ee615dc 8ee61a68 00000001 [ 72.891936] ... [ 72.896793] Call Trace: [ 72.901649] [<8eec4240>] mt7615_mac_fill_rx+0xac/0x494 [mt7615e] [ 72.913602] [<8eec09b0>] mt7615_queue_rx_skb+0xe4/0x12c [mt7615e] [ 72.925734] [<8eec9944>] mt76_dma_cleanup+0x390/0x42c [mt76] [ 72.936988] Code: ae020018 8ea20004 24030001 <94420004> a602002a 8ea20004 90420000 14430003 a2020034 [ 72.956390] [ 72.959676] ---[ end trace f176967739edb19f ]--- Fixes: 04b8e65922f6 ("mt76: add mac80211 driver for MT7615 PCIe-based chipsets") Signed-off-by: Lorenzo Bianconi <[email protected]> Signed-off-by: Felix Fietkau <[email protected]>
779 lines
19 KiB
C
779 lines
19 KiB
C
// SPDX-License-Identifier: ISC
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/* Copyright (C) 2019 MediaTek Inc.
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*
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* Author: Ryder Lee <[email protected]>
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* Roy Luo <[email protected]>
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* Felix Fietkau <[email protected]>
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* Lorenzo Bianconi <[email protected]>
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*/
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#include <linux/etherdevice.h>
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#include <linux/timekeeping.h>
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#include "mt7615.h"
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#include "../dma.h"
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#include "mac.h"
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static struct mt76_wcid *mt7615_rx_get_wcid(struct mt7615_dev *dev,
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u8 idx, bool unicast)
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{
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struct mt7615_sta *sta;
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struct mt76_wcid *wcid;
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if (idx >= ARRAY_SIZE(dev->mt76.wcid))
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return NULL;
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wcid = rcu_dereference(dev->mt76.wcid[idx]);
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if (unicast || !wcid)
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return wcid;
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if (!wcid->sta)
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return NULL;
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sta = container_of(wcid, struct mt7615_sta, wcid);
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if (!sta->vif)
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return NULL;
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return &sta->vif->sta.wcid;
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}
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static int mt7615_get_rate(struct mt7615_dev *dev,
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struct ieee80211_supported_band *sband,
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int idx, bool cck)
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{
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int offset = 0;
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int len = sband->n_bitrates;
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int i;
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if (cck) {
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if (sband == &dev->mt76.sband_5g.sband)
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return 0;
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idx &= ~BIT(2); /* short preamble */
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} else if (sband == &dev->mt76.sband_2g.sband) {
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offset = 4;
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}
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for (i = offset; i < len; i++) {
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if ((sband->bitrates[i].hw_value & GENMASK(7, 0)) == idx)
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return i;
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}
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return 0;
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}
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static void mt7615_insert_ccmp_hdr(struct sk_buff *skb, u8 key_id)
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{
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struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
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int hdr_len = ieee80211_get_hdrlen_from_skb(skb);
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u8 *pn = status->iv;
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u8 *hdr;
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__skb_push(skb, 8);
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memmove(skb->data, skb->data + 8, hdr_len);
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hdr = skb->data + hdr_len;
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hdr[0] = pn[5];
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hdr[1] = pn[4];
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hdr[2] = 0;
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hdr[3] = 0x20 | (key_id << 6);
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hdr[4] = pn[3];
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hdr[5] = pn[2];
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hdr[6] = pn[1];
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hdr[7] = pn[0];
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status->flag &= ~RX_FLAG_IV_STRIPPED;
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}
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int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb)
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{
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struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
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struct ieee80211_supported_band *sband;
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struct ieee80211_hdr *hdr;
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__le32 *rxd = (__le32 *)skb->data;
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u32 rxd0 = le32_to_cpu(rxd[0]);
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u32 rxd1 = le32_to_cpu(rxd[1]);
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u32 rxd2 = le32_to_cpu(rxd[2]);
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bool unicast, remove_pad, insert_ccmp_hdr = false;
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int i, idx;
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if (!test_bit(MT76_STATE_RUNNING, &dev->mt76.state))
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return -EINVAL;
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memset(status, 0, sizeof(*status));
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unicast = (rxd1 & MT_RXD1_NORMAL_ADDR_TYPE) == MT_RXD1_NORMAL_U2M;
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idx = FIELD_GET(MT_RXD2_NORMAL_WLAN_IDX, rxd2);
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status->wcid = mt7615_rx_get_wcid(dev, idx, unicast);
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/* TODO: properly support DBDC */
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status->freq = dev->mt76.chandef.chan->center_freq;
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status->band = dev->mt76.chandef.chan->band;
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if (status->band == NL80211_BAND_5GHZ)
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sband = &dev->mt76.sband_5g.sband;
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else
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sband = &dev->mt76.sband_2g.sband;
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if (rxd2 & MT_RXD2_NORMAL_FCS_ERR)
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status->flag |= RX_FLAG_FAILED_FCS_CRC;
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if (rxd2 & MT_RXD2_NORMAL_TKIP_MIC_ERR)
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status->flag |= RX_FLAG_MMIC_ERROR;
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if (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2) != 0 &&
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!(rxd2 & (MT_RXD2_NORMAL_CLM | MT_RXD2_NORMAL_CM))) {
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status->flag |= RX_FLAG_DECRYPTED;
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status->flag |= RX_FLAG_IV_STRIPPED;
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status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED;
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}
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remove_pad = rxd1 & MT_RXD1_NORMAL_HDR_OFFSET;
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if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR)
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return -EINVAL;
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if (!sband->channels)
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return -EINVAL;
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rxd += 4;
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if (rxd0 & MT_RXD0_NORMAL_GROUP_4) {
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rxd += 4;
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if ((u8 *)rxd - skb->data >= skb->len)
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return -EINVAL;
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}
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if (rxd0 & MT_RXD0_NORMAL_GROUP_1) {
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u8 *data = (u8 *)rxd;
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if (status->flag & RX_FLAG_DECRYPTED) {
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status->iv[0] = data[5];
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status->iv[1] = data[4];
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status->iv[2] = data[3];
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status->iv[3] = data[2];
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status->iv[4] = data[1];
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status->iv[5] = data[0];
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insert_ccmp_hdr = FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2);
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}
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rxd += 4;
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if ((u8 *)rxd - skb->data >= skb->len)
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return -EINVAL;
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}
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if (rxd0 & MT_RXD0_NORMAL_GROUP_2) {
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rxd += 2;
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if ((u8 *)rxd - skb->data >= skb->len)
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return -EINVAL;
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}
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if (rxd0 & MT_RXD0_NORMAL_GROUP_3) {
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u32 rxdg0 = le32_to_cpu(rxd[0]);
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u32 rxdg1 = le32_to_cpu(rxd[1]);
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u8 stbc = FIELD_GET(MT_RXV1_HT_STBC, rxdg0);
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bool cck = false;
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i = FIELD_GET(MT_RXV1_TX_RATE, rxdg0);
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switch (FIELD_GET(MT_RXV1_TX_MODE, rxdg0)) {
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case MT_PHY_TYPE_CCK:
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cck = true;
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/* fall through */
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case MT_PHY_TYPE_OFDM:
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i = mt7615_get_rate(dev, sband, i, cck);
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break;
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case MT_PHY_TYPE_HT_GF:
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case MT_PHY_TYPE_HT:
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status->encoding = RX_ENC_HT;
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if (i > 31)
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return -EINVAL;
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break;
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case MT_PHY_TYPE_VHT:
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status->nss = FIELD_GET(MT_RXV2_NSTS, rxdg1) + 1;
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status->encoding = RX_ENC_VHT;
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break;
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default:
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return -EINVAL;
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}
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status->rate_idx = i;
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switch (FIELD_GET(MT_RXV1_FRAME_MODE, rxdg0)) {
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case MT_PHY_BW_20:
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break;
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case MT_PHY_BW_40:
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status->bw = RATE_INFO_BW_40;
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break;
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case MT_PHY_BW_80:
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status->bw = RATE_INFO_BW_80;
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break;
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case MT_PHY_BW_160:
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status->bw = RATE_INFO_BW_160;
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break;
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default:
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return -EINVAL;
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}
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if (rxdg0 & MT_RXV1_HT_SHORT_GI)
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status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
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if (rxdg0 & MT_RXV1_HT_AD_CODE)
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status->enc_flags |= RX_ENC_FLAG_LDPC;
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status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;
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/* TODO: RSSI */
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rxd += 6;
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if ((u8 *)rxd - skb->data >= skb->len)
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return -EINVAL;
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}
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skb_pull(skb, (u8 *)rxd - skb->data + 2 * remove_pad);
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if (insert_ccmp_hdr) {
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u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1);
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mt7615_insert_ccmp_hdr(skb, key_id);
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}
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hdr = (struct ieee80211_hdr *)skb->data;
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if (!status->wcid || !ieee80211_is_data_qos(hdr->frame_control))
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return 0;
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status->aggr = unicast &&
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!ieee80211_is_qos_nullfunc(hdr->frame_control);
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status->tid = *ieee80211_get_qos_ctl(hdr) & IEEE80211_QOS_CTL_TID_MASK;
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status->seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl));
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return 0;
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}
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void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps)
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{
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}
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void mt7615_tx_complete_skb(struct mt76_dev *mdev, enum mt76_txq_id qid,
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struct mt76_queue_entry *e)
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{
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if (!e->txwi) {
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dev_kfree_skb_any(e->skb);
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return;
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}
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/* error path */
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if (e->skb == DMA_DUMMY_DATA) {
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struct mt76_txwi_cache *t;
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struct mt7615_dev *dev;
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struct mt7615_txp *txp;
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u8 *txwi_ptr;
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txwi_ptr = mt76_get_txwi_ptr(mdev, e->txwi);
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txp = (struct mt7615_txp *)(txwi_ptr + MT_TXD_SIZE);
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dev = container_of(mdev, struct mt7615_dev, mt76);
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spin_lock_bh(&dev->token_lock);
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t = idr_remove(&dev->token, le16_to_cpu(txp->token));
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spin_unlock_bh(&dev->token_lock);
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e->skb = t ? t->skb : NULL;
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}
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if (e->skb)
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mt76_tx_complete_skb(mdev, e->skb);
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}
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u16 mt7615_mac_tx_rate_val(struct mt7615_dev *dev,
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const struct ieee80211_tx_rate *rate,
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bool stbc, u8 *bw)
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{
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u8 phy, nss, rate_idx;
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u16 rateval;
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*bw = 0;
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if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
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rate_idx = ieee80211_rate_get_vht_mcs(rate);
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nss = ieee80211_rate_get_vht_nss(rate);
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phy = MT_PHY_TYPE_VHT;
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if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
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*bw = 1;
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else if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH)
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*bw = 2;
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else if (rate->flags & IEEE80211_TX_RC_160_MHZ_WIDTH)
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*bw = 3;
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} else if (rate->flags & IEEE80211_TX_RC_MCS) {
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rate_idx = rate->idx;
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nss = 1 + (rate->idx >> 3);
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phy = MT_PHY_TYPE_HT;
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if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD)
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phy = MT_PHY_TYPE_HT_GF;
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if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
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*bw = 1;
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} else {
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const struct ieee80211_rate *r;
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int band = dev->mt76.chandef.chan->band;
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u16 val;
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nss = 1;
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r = &mt76_hw(dev)->wiphy->bands[band]->bitrates[rate->idx];
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if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
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val = r->hw_value_short;
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else
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val = r->hw_value;
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phy = val >> 8;
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rate_idx = val & 0xff;
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}
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rateval = (FIELD_PREP(MT_TX_RATE_IDX, rate_idx) |
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FIELD_PREP(MT_TX_RATE_MODE, phy) |
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FIELD_PREP(MT_TX_RATE_NSS, nss - 1));
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if (stbc && nss == 1)
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rateval |= MT_TX_RATE_STBC;
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return rateval;
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}
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int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
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struct sk_buff *skb, struct mt76_wcid *wcid,
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struct ieee80211_sta *sta, int pid,
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struct ieee80211_key_conf *key)
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{
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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struct ieee80211_tx_rate *rate = &info->control.rates[0];
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
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struct ieee80211_vif *vif = info->control.vif;
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int tx_count = 8;
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u8 fc_type, fc_stype, p_fmt, q_idx, omac_idx = 0;
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__le16 fc = hdr->frame_control;
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u16 seqno = 0;
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u32 val;
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if (vif) {
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struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
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omac_idx = mvif->omac_idx;
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}
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if (sta) {
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struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv;
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tx_count = msta->rate_count;
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}
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fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;
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fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;
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if (ieee80211_is_data(fc)) {
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q_idx = skb_get_queue_mapping(skb);
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p_fmt = MT_TX_TYPE_CT;
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} else if (ieee80211_is_beacon(fc)) {
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q_idx = MT_LMAC_BCN0;
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p_fmt = MT_TX_TYPE_FW;
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} else {
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q_idx = MT_LMAC_ALTX0;
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p_fmt = MT_TX_TYPE_CT;
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}
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val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + MT_TXD_SIZE) |
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FIELD_PREP(MT_TXD0_P_IDX, MT_TX_PORT_IDX_LMAC) |
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FIELD_PREP(MT_TXD0_Q_IDX, q_idx);
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txwi[0] = cpu_to_le32(val);
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val = MT_TXD1_LONG_FORMAT |
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FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |
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FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |
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FIELD_PREP(MT_TXD1_HDR_INFO,
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ieee80211_get_hdrlen_from_skb(skb) / 2) |
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FIELD_PREP(MT_TXD1_TID,
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skb->priority & IEEE80211_QOS_CTL_TID_MASK) |
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FIELD_PREP(MT_TXD1_PKT_FMT, p_fmt) |
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FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);
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txwi[1] = cpu_to_le32(val);
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val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |
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FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) |
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FIELD_PREP(MT_TXD2_MULTICAST,
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is_multicast_ether_addr(hdr->addr1));
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txwi[2] = cpu_to_le32(val);
|
|
|
|
if (!(info->flags & IEEE80211_TX_CTL_AMPDU))
|
|
txwi[2] |= cpu_to_le32(MT_TXD2_BA_DISABLE);
|
|
|
|
txwi[4] = 0;
|
|
txwi[6] = 0;
|
|
|
|
if (rate->idx >= 0 && rate->count &&
|
|
!(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
|
|
bool stbc = info->flags & IEEE80211_TX_CTL_STBC;
|
|
u8 bw;
|
|
u16 rateval = mt7615_mac_tx_rate_val(dev, rate, stbc, &bw);
|
|
|
|
txwi[2] |= cpu_to_le32(MT_TXD2_FIX_RATE);
|
|
|
|
val = MT_TXD6_FIXED_BW |
|
|
FIELD_PREP(MT_TXD6_BW, bw) |
|
|
FIELD_PREP(MT_TXD6_TX_RATE, rateval);
|
|
txwi[6] |= cpu_to_le32(val);
|
|
|
|
if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
|
|
txwi[6] |= cpu_to_le32(MT_TXD6_SGI);
|
|
|
|
if (info->flags & IEEE80211_TX_CTL_LDPC)
|
|
txwi[6] |= cpu_to_le32(MT_TXD6_LDPC);
|
|
|
|
if (!(rate->flags & (IEEE80211_TX_RC_MCS |
|
|
IEEE80211_TX_RC_VHT_MCS)))
|
|
txwi[2] |= cpu_to_le32(MT_TXD2_BA_DISABLE);
|
|
|
|
tx_count = rate->count;
|
|
}
|
|
|
|
if (!ieee80211_is_beacon(fc)) {
|
|
val = MT_TXD5_TX_STATUS_HOST | MT_TXD5_SW_POWER_MGMT |
|
|
FIELD_PREP(MT_TXD5_PID, pid);
|
|
txwi[5] = cpu_to_le32(val);
|
|
} else {
|
|
txwi[5] = 0;
|
|
/* use maximum tx count for beacons */
|
|
tx_count = 0x1f;
|
|
}
|
|
|
|
val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, tx_count);
|
|
if (ieee80211_is_data_qos(hdr->frame_control)) {
|
|
seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl));
|
|
val |= MT_TXD3_SN_VALID;
|
|
} else if (ieee80211_is_back_req(hdr->frame_control)) {
|
|
struct ieee80211_bar *bar = (struct ieee80211_bar *)skb->data;
|
|
|
|
seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(bar->start_seq_num));
|
|
val |= MT_TXD3_SN_VALID;
|
|
}
|
|
val |= FIELD_PREP(MT_TXD3_SEQ, seqno);
|
|
|
|
txwi[3] = cpu_to_le32(val);
|
|
|
|
if (info->flags & IEEE80211_TX_CTL_NO_ACK)
|
|
txwi[3] |= cpu_to_le32(MT_TXD3_NO_ACK);
|
|
|
|
if (key)
|
|
txwi[3] |= cpu_to_le32(MT_TXD3_PROTECT_FRAME);
|
|
|
|
txwi[7] = FIELD_PREP(MT_TXD7_TYPE, fc_type) |
|
|
FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void mt7615_txp_skb_unmap(struct mt76_dev *dev,
|
|
struct mt76_txwi_cache *t)
|
|
{
|
|
struct mt7615_txp *txp;
|
|
u8 *txwi;
|
|
int i;
|
|
|
|
txwi = mt76_get_txwi_ptr(dev, t);
|
|
txp = (struct mt7615_txp *)(txwi + MT_TXD_SIZE);
|
|
for (i = 1; i < txp->nbuf; i++)
|
|
dma_unmap_single(dev->dev, le32_to_cpu(txp->buf[i]),
|
|
le16_to_cpu(txp->len[i]), DMA_TO_DEVICE);
|
|
}
|
|
|
|
int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
|
|
enum mt76_txq_id qid, struct mt76_wcid *wcid,
|
|
struct ieee80211_sta *sta,
|
|
struct mt76_tx_info *tx_info)
|
|
{
|
|
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx_info->skb->data;
|
|
struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
|
|
struct mt7615_sta *msta = container_of(wcid, struct mt7615_sta, wcid);
|
|
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
|
|
struct ieee80211_key_conf *key = info->control.hw_key;
|
|
struct ieee80211_vif *vif = info->control.vif;
|
|
int i, pid, id, nbuf = tx_info->nbuf - 1;
|
|
u8 *txwi = (u8 *)txwi_ptr;
|
|
struct mt76_txwi_cache *t;
|
|
struct mt7615_txp *txp;
|
|
|
|
if (!wcid)
|
|
wcid = &dev->mt76.global_wcid;
|
|
|
|
pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb);
|
|
|
|
if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) {
|
|
spin_lock_bh(&dev->mt76.lock);
|
|
msta->rate_probe = true;
|
|
mt7615_mcu_set_rates(dev, msta, &info->control.rates[0],
|
|
msta->rates);
|
|
spin_unlock_bh(&dev->mt76.lock);
|
|
}
|
|
|
|
mt7615_mac_write_txwi(dev, txwi_ptr, tx_info->skb, wcid, sta,
|
|
pid, key);
|
|
|
|
txp = (struct mt7615_txp *)(txwi + MT_TXD_SIZE);
|
|
for (i = 0; i < nbuf; i++) {
|
|
txp->buf[i] = cpu_to_le32(tx_info->buf[i + 1].addr);
|
|
txp->len[i] = cpu_to_le16(tx_info->buf[i + 1].len);
|
|
}
|
|
txp->nbuf = nbuf;
|
|
|
|
/* pass partial skb header to fw */
|
|
tx_info->buf[1].len = MT_CT_PARSE_LEN;
|
|
tx_info->nbuf = MT_CT_DMA_BUF_NUM;
|
|
|
|
txp->flags = cpu_to_le16(MT_CT_INFO_APPLY_TXD);
|
|
|
|
if (!key)
|
|
txp->flags |= cpu_to_le16(MT_CT_INFO_NONE_CIPHER_FRAME);
|
|
|
|
if (ieee80211_is_mgmt(hdr->frame_control))
|
|
txp->flags |= cpu_to_le16(MT_CT_INFO_MGMT_FRAME);
|
|
|
|
if (vif) {
|
|
struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
|
|
|
|
txp->bss_idx = mvif->idx;
|
|
}
|
|
|
|
t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size);
|
|
t->skb = tx_info->skb;
|
|
|
|
spin_lock_bh(&dev->token_lock);
|
|
id = idr_alloc(&dev->token, t, 0, MT7615_TOKEN_SIZE, GFP_ATOMIC);
|
|
spin_unlock_bh(&dev->token_lock);
|
|
if (id < 0)
|
|
return id;
|
|
|
|
txp->token = cpu_to_le16(id);
|
|
txp->rept_wds_wcid = 0xff;
|
|
tx_info->skb = DMA_DUMMY_DATA;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta,
|
|
struct ieee80211_tx_info *info, __le32 *txs_data)
|
|
{
|
|
struct ieee80211_supported_band *sband;
|
|
int i, idx, count, final_idx = 0;
|
|
bool fixed_rate, final_mpdu, ack_timeout;
|
|
bool probe, ampdu, cck = false;
|
|
u32 final_rate, final_rate_flags, final_nss, txs;
|
|
u8 pid;
|
|
|
|
fixed_rate = info->status.rates[0].count;
|
|
probe = !!(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
|
|
|
|
txs = le32_to_cpu(txs_data[1]);
|
|
final_mpdu = txs & MT_TXS1_ACKED_MPDU;
|
|
ampdu = !fixed_rate && (txs & MT_TXS1_AMPDU);
|
|
|
|
txs = le32_to_cpu(txs_data[3]);
|
|
count = FIELD_GET(MT_TXS3_TX_COUNT, txs);
|
|
|
|
txs = le32_to_cpu(txs_data[0]);
|
|
pid = FIELD_GET(MT_TXS0_PID, txs);
|
|
final_rate = FIELD_GET(MT_TXS0_TX_RATE, txs);
|
|
ack_timeout = txs & MT_TXS0_ACK_TIMEOUT;
|
|
|
|
if (!ampdu && (txs & MT_TXS0_RTS_TIMEOUT))
|
|
return false;
|
|
|
|
if (txs & MT_TXS0_QUEUE_TIMEOUT)
|
|
return false;
|
|
|
|
if (!ack_timeout)
|
|
info->flags |= IEEE80211_TX_STAT_ACK;
|
|
|
|
info->status.ampdu_len = 1;
|
|
info->status.ampdu_ack_len = !!(info->flags &
|
|
IEEE80211_TX_STAT_ACK);
|
|
|
|
if (ampdu || (info->flags & IEEE80211_TX_CTL_AMPDU))
|
|
info->flags |= IEEE80211_TX_STAT_AMPDU | IEEE80211_TX_CTL_AMPDU;
|
|
|
|
if (fixed_rate && !probe) {
|
|
info->status.rates[0].count = count;
|
|
goto out;
|
|
}
|
|
|
|
for (i = 0, idx = 0; i < ARRAY_SIZE(info->status.rates); i++) {
|
|
int cur_count = min_t(int, count, 2 * MT7615_RATE_RETRY);
|
|
|
|
if (!i && probe) {
|
|
cur_count = 1;
|
|
} else {
|
|
info->status.rates[i] = sta->rates[idx];
|
|
idx++;
|
|
}
|
|
|
|
if (i && info->status.rates[i].idx < 0) {
|
|
info->status.rates[i - 1].count += count;
|
|
break;
|
|
}
|
|
|
|
if (!count) {
|
|
info->status.rates[i].idx = -1;
|
|
break;
|
|
}
|
|
|
|
info->status.rates[i].count = cur_count;
|
|
final_idx = i;
|
|
count -= cur_count;
|
|
}
|
|
|
|
out:
|
|
final_rate_flags = info->status.rates[final_idx].flags;
|
|
|
|
switch (FIELD_GET(MT_TX_RATE_MODE, final_rate)) {
|
|
case MT_PHY_TYPE_CCK:
|
|
cck = true;
|
|
/* fall through */
|
|
case MT_PHY_TYPE_OFDM:
|
|
if (dev->mt76.chandef.chan->band == NL80211_BAND_5GHZ)
|
|
sband = &dev->mt76.sband_5g.sband;
|
|
else
|
|
sband = &dev->mt76.sband_2g.sband;
|
|
final_rate &= MT_TX_RATE_IDX;
|
|
final_rate = mt7615_get_rate(dev, sband, final_rate, cck);
|
|
final_rate_flags = 0;
|
|
break;
|
|
case MT_PHY_TYPE_HT_GF:
|
|
case MT_PHY_TYPE_HT:
|
|
final_rate_flags |= IEEE80211_TX_RC_MCS;
|
|
final_rate &= MT_TX_RATE_IDX;
|
|
if (final_rate > 31)
|
|
return false;
|
|
break;
|
|
case MT_PHY_TYPE_VHT:
|
|
final_nss = FIELD_GET(MT_TX_RATE_NSS, final_rate);
|
|
final_rate_flags |= IEEE80211_TX_RC_VHT_MCS;
|
|
final_rate = (final_rate & MT_TX_RATE_IDX) | (final_nss << 4);
|
|
break;
|
|
default:
|
|
return false;
|
|
}
|
|
|
|
info->status.rates[final_idx].idx = final_rate;
|
|
info->status.rates[final_idx].flags = final_rate_flags;
|
|
|
|
return true;
|
|
}
|
|
|
|
static bool mt7615_mac_add_txs_skb(struct mt7615_dev *dev,
|
|
struct mt7615_sta *sta, int pid,
|
|
__le32 *txs_data)
|
|
{
|
|
struct mt76_dev *mdev = &dev->mt76;
|
|
struct sk_buff_head list;
|
|
struct sk_buff *skb;
|
|
|
|
if (pid < MT_PACKET_ID_FIRST)
|
|
return false;
|
|
|
|
mt76_tx_status_lock(mdev, &list);
|
|
skb = mt76_tx_status_skb_get(mdev, &sta->wcid, pid, &list);
|
|
if (skb) {
|
|
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
|
|
|
if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) {
|
|
spin_lock_bh(&dev->mt76.lock);
|
|
if (sta->rate_probe) {
|
|
mt7615_mcu_set_rates(dev, sta, NULL,
|
|
sta->rates);
|
|
sta->rate_probe = false;
|
|
}
|
|
spin_unlock_bh(&dev->mt76.lock);
|
|
}
|
|
|
|
if (!mt7615_fill_txs(dev, sta, info, txs_data)) {
|
|
ieee80211_tx_info_clear_status(info);
|
|
info->status.rates[0].idx = -1;
|
|
}
|
|
|
|
mt76_tx_status_skb_done(mdev, skb, &list);
|
|
}
|
|
mt76_tx_status_unlock(mdev, &list);
|
|
|
|
return !!skb;
|
|
}
|
|
|
|
void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data)
|
|
{
|
|
struct ieee80211_tx_info info = {};
|
|
struct ieee80211_sta *sta = NULL;
|
|
struct mt7615_sta *msta = NULL;
|
|
struct mt76_wcid *wcid;
|
|
__le32 *txs_data = data;
|
|
u32 txs;
|
|
u8 wcidx;
|
|
u8 pid;
|
|
|
|
txs = le32_to_cpu(txs_data[0]);
|
|
pid = FIELD_GET(MT_TXS0_PID, txs);
|
|
txs = le32_to_cpu(txs_data[2]);
|
|
wcidx = FIELD_GET(MT_TXS2_WCID, txs);
|
|
|
|
if (pid == MT_PACKET_ID_NO_ACK)
|
|
return;
|
|
|
|
if (wcidx >= ARRAY_SIZE(dev->mt76.wcid))
|
|
return;
|
|
|
|
rcu_read_lock();
|
|
|
|
wcid = rcu_dereference(dev->mt76.wcid[wcidx]);
|
|
if (!wcid)
|
|
goto out;
|
|
|
|
msta = container_of(wcid, struct mt7615_sta, wcid);
|
|
sta = wcid_to_sta(wcid);
|
|
|
|
if (mt7615_mac_add_txs_skb(dev, msta, pid, txs_data))
|
|
goto out;
|
|
|
|
if (wcidx >= MT7615_WTBL_STA || !sta)
|
|
goto out;
|
|
|
|
if (mt7615_fill_txs(dev, msta, &info, txs_data))
|
|
ieee80211_tx_status_noskb(mt76_hw(dev), sta, &info);
|
|
|
|
out:
|
|
rcu_read_unlock();
|
|
}
|
|
|
|
void mt7615_mac_tx_free(struct mt7615_dev *dev, struct sk_buff *skb)
|
|
{
|
|
struct mt7615_tx_free *free = (struct mt7615_tx_free *)skb->data;
|
|
struct mt76_dev *mdev = &dev->mt76;
|
|
struct mt76_txwi_cache *txwi;
|
|
u8 i, count;
|
|
|
|
count = FIELD_GET(MT_TX_FREE_MSDU_ID_CNT, le16_to_cpu(free->ctrl));
|
|
for (i = 0; i < count; i++) {
|
|
spin_lock_bh(&dev->token_lock);
|
|
txwi = idr_remove(&dev->token, le16_to_cpu(free->token[i]));
|
|
spin_unlock_bh(&dev->token_lock);
|
|
|
|
if (!txwi)
|
|
continue;
|
|
|
|
mt7615_txp_skb_unmap(mdev, txwi);
|
|
if (txwi->skb) {
|
|
mt76_tx_complete_skb(mdev, txwi->skb);
|
|
txwi->skb = NULL;
|
|
}
|
|
|
|
mt76_put_txwi(mdev, txwi);
|
|
}
|
|
dev_kfree_skb(skb);
|
|
}
|
|
|
|
void mt7615_mac_work(struct work_struct *work)
|
|
{
|
|
struct mt7615_dev *dev;
|
|
|
|
dev = (struct mt7615_dev *)container_of(work, struct mt76_dev,
|
|
mac_work.work);
|
|
|
|
mt76_tx_status_check(&dev->mt76, NULL, false);
|
|
ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mt76.mac_work,
|
|
MT7615_WATCHDOG_TIME);
|
|
}
|