mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 21:36:52 +00:00
Lorenzo BianconiandFelix Fietkau
e826923c53
In order to not always reallocate them during NPU reset, store the DMA mapped buffer addresses allocated by mt7996_npu_hw_init routine in mt7996 structure. Tested-by: Kang Yang <[email protected]> Signed-off-by: Lorenzo Bianconi <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Felix Fietkau <[email protected]>
632 lines
15 KiB
C
632 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2025 AIROHA Inc
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* Author: Lorenzo Bianconi <[email protected]>
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*/
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#include <linux/kernel.h>
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#include <linux/soc/airoha/airoha_offload.h>
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#include "mt7996.h"
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static int mt7992_npu_txrx_offload_init(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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u32 hif1_ofs = dev->hif2 ? MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0) : 0;
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phys_addr_t phy_addr = dev->mt76.mmio.phy_addr;
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u32 dma_addr;
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int i, err;
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for (i = MT_BAND0; i < MT_BAND2; i++) {
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err = mt76_npu_send_msg(npu, i, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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dma_addr = phy_addr;
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if (i)
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dma_addr += MT_TXQ_RING_BASE(0) + 0x150 + hif1_ofs;
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else
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dma_addr += MT_TXQ_RING_BASE(0) + 0x120;
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err = mt76_npu_send_msg(npu, i,
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WLAN_FUNC_SET_WAIT_TX_RING_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx desc addr\n");
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return err;
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}
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}
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err = mt76_npu_send_msg(npu, 9, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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phy_addr + MT_RXQ_RRO_AP_RING_BASE,
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GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rxdmad_c addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 9, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rxdmad_c desc size\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 2, WLAN_FUNC_SET_WAIT_TX_RING_PCIE_ADDR,
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phy_addr + MT_RRO_ACK_SN_CTRL, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx desc addr\n");
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return err;
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}
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return 0;
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}
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static int mt7996_npu_txrx_offload_init(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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u32 hif1_ofs = dev->hif2 ? MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0) : 0;
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phys_addr_t phy_addr = dev->mt76.mmio.phy_addr;
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u32 dma_addr;
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int err;
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/* npu rx rro ring0 */
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err = mt76_npu_send_msg(npu, 0, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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/* npu rx rro ring1 */
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err = mt76_npu_send_msg(npu, 2, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_NPU_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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/* msdu pg 2GHz */
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dma_addr = phy_addr + MT_RXQ_RING_BASE(MT_RXQ_MSDU_PAGE_BAND0) + 0xa0;
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err = mt76_npu_send_msg(npu, 5, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 5, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_NPU_RX_RING_SIZE / 4, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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/* msdu pg 5GHz */
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dma_addr = phy_addr + MT_RXQ_RING_BASE(MT_RXQ_MSDU_PAGE_BAND1) + 0xb0;
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err = mt76_npu_send_msg(npu, 6, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 6, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_NPU_RX_RING_SIZE / 2, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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/* msdu pg 6GHz */
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dma_addr = phy_addr + MT_RXQ_RING_BASE(MT_RXQ_MSDU_PAGE_BAND2) + 0xc0;
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err = mt76_npu_send_msg(npu, 7, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 7, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_NPU_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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/* ind cmd ring */
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err = mt76_npu_send_msg(npu, 8, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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phy_addr + MT_RXQ_RRO_IND_RING_BASE,
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GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe desc addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 8, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_RX_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx desc size\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 3, WLAN_FUNC_SET_WAIT_TX_RING_PCIE_ADDR,
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phy_addr + MT_RRO_ACK_SN_CTRL, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx desc addr\n");
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return err;
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}
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/* npu tx */
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dma_addr = phy_addr + MT_TXQ_RING_BASE(1) + 0x120;
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err = mt76_npu_send_msg(npu, 0, WLAN_FUNC_SET_WAIT_TX_RING_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx desc addr\n");
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return err;
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}
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dma_addr = phy_addr + MT_TXQ_RING_BASE(0) + 0x150 + hif1_ofs;
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err = mt76_npu_send_msg(npu, 2, WLAN_FUNC_SET_WAIT_TX_RING_PCIE_ADDR,
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dma_addr, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx desc addr\n");
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return err;
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}
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return 0;
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}
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static int mt7996_npu_offload_init(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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u32 val;
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int err;
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err = mt76_npu_get_msg(npu, 0, WLAN_FUNC_GET_WAIT_NPU_VERSION,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev, "failed getting NPU fw version\n");
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return err;
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}
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dev_info(dev->mt76.dev, "NPU version: %0d.%d\n",
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(val >> 16) & 0xffff, val & 0xffff);
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err = mt76_npu_send_msg(npu, 0, WLAN_FUNC_SET_WAIT_PCIE_PORT_TYPE,
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dev->mt76.mmio.npu_type, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan PCIe port type\n");
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return err;
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}
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if (is_mt7996(&dev->mt76))
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err = mt7996_npu_txrx_offload_init(dev, npu);
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else
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err = mt7992_npu_txrx_offload_init(dev, npu);
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if (err)
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return err;
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err = mt76_npu_send_msg(npu, 0, WLAN_FUNC_SET_WAIT_TOKEN_ID_SIZE,
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MT7996_HW_TOKEN_SIZE, GFP_KERNEL);
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if (err)
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return err;
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dev->mt76.token_start = MT7996_HW_TOKEN_SIZE;
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return 0;
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}
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static int mt7992_npu_rxd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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{
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u32 val;
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int err;
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err = mt76_npu_get_msg(npu, 0, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retrieving NPU wlan rx ring0 addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_BAND0].regs->desc_base);
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err = mt76_npu_get_msg(npu, 1, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retrieving NPU wlan rx ring1 addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_BAND1].regs->desc_base);
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err = mt76_npu_get_msg(npu, 9, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retrieving NPU wlan rxdmad_c ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_RXDMAD_C].regs->desc_base);
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return 0;
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}
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static int mt7996_npu_rxd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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{
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u32 val;
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int err;
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err = mt76_npu_get_msg(npu, 0, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan rx ring0 addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_BAND0].regs->desc_base);
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err = mt76_npu_get_msg(npu, 2, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan rx ring2 addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_BAND2].regs->desc_base);
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/* msdu pg ring */
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err = mt76_npu_get_msg(npu, 10, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan msdu pg ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_MSDU_PAGE_BAND0].regs->desc_base);
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err = mt76_npu_get_msg(npu, 11, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan msdu pg ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_MSDU_PAGE_BAND1].regs->desc_base);
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err = mt76_npu_get_msg(npu, 12, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan msdu pg ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_MSDU_PAGE_BAND2].regs->desc_base);
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/* ind_cmd ring */
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err = mt76_npu_get_msg(npu, 8, WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retriving NPU wlan ind_cmd ring addr\n");
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return err;
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}
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writel(val, &dev->mt76.q_rx[MT_RXQ_RRO_IND].regs->desc_base);
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return 0;
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}
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static int mt7996_npu_txd_init(struct mt7996_dev *dev, struct airoha_npu *npu)
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{
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const enum mt76_band_id band_list[] = {
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MT_BAND0,
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is_mt7996(&dev->mt76) ? MT_BAND2 : MT_BAND1,
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};
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int i, index = 0;
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BUILD_BUG_ON(ARRAY_SIZE(band_list) * 3 !=
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ARRAY_SIZE(dev->npu_txd_addr));
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for (i = 0; i < ARRAY_SIZE(band_list); i++) {
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int err, band = band_list[i], phy_id;
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u32 val;
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err = mt76_npu_get_msg(npu, band + 5,
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WLAN_FUNC_GET_WAIT_RXDESC_BASE,
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&val, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed retrieving NPU wlan tx ring addr\n");
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return err;
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}
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phy_id = is_mt7996(&dev->mt76) ? band == MT_BAND0 ? 1 : 0
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: band;
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writel(val, &dev->mt76.phys[phy_id]->q_tx[0]->regs->desc_base);
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err = mt76_npu_send_msg(npu, band,
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WLAN_FUNC_SET_WAIT_TX_BUF_SPACE_HW_BASE,
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dev->npu_txd_addr[index++], GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan queue buf addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, band + 5,
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WLAN_FUNC_SET_WAIT_TX_BUF_SPACE_HW_BASE,
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dev->npu_txd_addr[index++],
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GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx buf addr\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, band + 10,
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WLAN_FUNC_SET_WAIT_TX_BUF_SPACE_HW_BASE,
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dev->npu_txd_addr[index++],
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GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx buf base\n");
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return err;
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}
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}
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return 0;
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}
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static int mt7996_npu_rx_event_init(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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int qid = is_mt7996(&dev->mt76) ? MT_RXQ_TXFREE_BAND0 : MT_RXQ_MAIN_WA;
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phys_addr_t phy_addr = dev->mt76.mmio.phy_addr;
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struct mt76_queue *q = &dev->mt76.q_rx[qid];
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int err;
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err = mt76_npu_send_msg(npu, 0,
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WLAN_FUNC_SET_WAIT_RX_RING_FOR_TXDONE_HW_BASE,
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q->desc_dma, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan tx-done ring\n");
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return err;
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}
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err = mt76_npu_send_msg(npu, 10, WLAN_FUNC_SET_WAIT_DESC,
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MT7996_RX_MCU_RING_SIZE, GFP_KERNEL);
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if (err) {
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan descriptors\n");
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return err;
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}
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phy_addr += MT_RXQ_RING_BASE(qid);
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phy_addr += is_mt7996(&dev->mt76) ? 0x90 : 0x20;
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err = mt76_npu_send_msg(npu, 10, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
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phy_addr, GFP_KERNEL);
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if (err)
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dev_warn(dev->mt76.dev,
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"failed setting NPU wlan rx pcie address\n");
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return err;
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}
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static int mt7996_npu_set_pcie_addr(struct mt7996_dev *dev,
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struct airoha_npu *npu)
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{
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u32 hif1_ofs = dev->hif2 ? MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0) : 0;
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dma_addr_t dma_addr = dev->mt76.mmio.phy_addr;
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int err;
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dma_addr += MT_RXQ_RING_BASE(MT_RXQ_RRO_BAND0) + 0x80;
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err = mt76_npu_send_msg(npu, 0, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
|
|
dma_addr, GFP_KERNEL);
|
|
if (err) {
|
|
dev_warn(dev->mt76.dev,
|
|
"failed setting NPU wlan PCIe desc addr\n");
|
|
return err;
|
|
}
|
|
|
|
dma_addr = dev->mt76.mmio.phy_addr + hif1_ofs;
|
|
if (is_mt7996(&dev->mt76)) {
|
|
dma_addr += MT_RXQ_RING_BASE(MT_RXQ_RRO_BAND2) + 0x60;
|
|
err = mt76_npu_send_msg(npu, 2, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
|
|
dma_addr, GFP_KERNEL);
|
|
} else {
|
|
dma_addr += MT_RXQ_RING_BASE(MT_RXQ_RRO_BAND1) + 0x90;
|
|
err = mt76_npu_send_msg(npu, 1, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
|
|
dma_addr, GFP_KERNEL);
|
|
}
|
|
|
|
if (err)
|
|
dev_warn(dev->mt76.dev,
|
|
"failed setting NPU wlan PCIe desc addr\n");
|
|
|
|
return err;
|
|
}
|
|
|
|
static int mt7996_npu_tx_done_init(struct mt7996_dev *dev,
|
|
struct airoha_npu *npu)
|
|
{
|
|
int err;
|
|
|
|
/* rro ring cpu idx */
|
|
err = mt76_npu_send_msg(npu, 15, WLAN_FUNC_SET_WAIT_PCIE_ADDR,
|
|
0, GFP_KERNEL);
|
|
if (err) {
|
|
dev_warn(dev->mt76.dev,
|
|
"failed setting NPU wlan PCIe desc addr\n");
|
|
return err;
|
|
}
|
|
|
|
err = mt76_npu_send_msg(npu, 2, WLAN_FUNC_SET_WAIT_INODE_TXRX_REG_ADDR,
|
|
0, GFP_KERNEL);
|
|
if (err) {
|
|
dev_warn(dev->mt76.dev, "failed setting NPU wlan txrx addr2\n");
|
|
return err;
|
|
}
|
|
|
|
err = mt76_npu_send_msg(npu, 7, WLAN_FUNC_SET_WAIT_INODE_TXRX_REG_ADDR,
|
|
0, GFP_KERNEL);
|
|
if (err)
|
|
dev_warn(dev->mt76.dev, "failed setting NPU wlan txrx addr7\n");
|
|
|
|
return err;
|
|
}
|
|
|
|
int mt7996_npu_rx_queues_init(struct mt7996_dev *dev)
|
|
{
|
|
int err;
|
|
|
|
if (!mt76_npu_device_active(&dev->mt76))
|
|
return 0;
|
|
|
|
err = mt76_npu_rx_queue_init(&dev->mt76,
|
|
&dev->mt76.q_rx[MT_RXQ_NPU0]);
|
|
if (err)
|
|
return err;
|
|
|
|
return mt76_npu_rx_queue_init(&dev->mt76,
|
|
&dev->mt76.q_rx[MT_RXQ_NPU1]);
|
|
}
|
|
|
|
int __mt7996_npu_hw_init(struct mt7996_dev *dev)
|
|
{
|
|
struct airoha_npu *npu;
|
|
int i, err;
|
|
|
|
npu = rcu_dereference_protected(dev->mt76.mmio.npu, &dev->mt76.mutex);
|
|
if (!npu)
|
|
return 0;
|
|
|
|
err = mt7996_npu_offload_init(dev, npu);
|
|
if (err)
|
|
return err;
|
|
|
|
if (is_mt7996(&dev->mt76))
|
|
err = mt7996_npu_rxd_init(dev, npu);
|
|
else
|
|
err = mt7992_npu_rxd_init(dev, npu);
|
|
|
|
if (err)
|
|
return err;
|
|
|
|
err = mt7996_npu_txd_init(dev, npu);
|
|
if (err)
|
|
return err;
|
|
|
|
err = mt7996_npu_rx_event_init(dev, npu);
|
|
if (err)
|
|
return err;
|
|
|
|
err = mt7996_npu_set_pcie_addr(dev, npu);
|
|
if (err)
|
|
return err;
|
|
|
|
err = mt7996_npu_tx_done_init(dev, npu);
|
|
if (err)
|
|
return err;
|
|
|
|
for (i = MT_RXQ_NPU0; i <= MT_RXQ_NPU1; i++)
|
|
airoha_npu_wlan_enable_irq(npu, i - MT_RXQ_NPU0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int mt7996_npu_hw_init(struct mt7996_dev *dev)
|
|
{
|
|
int i, err;
|
|
|
|
BUILD_BUG_ON(ARRAY_SIZE(dev->npu_txd_addr) % 3);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(dev->npu_txd_addr); i += 3) {
|
|
int band = i && is_mt7996(&dev->mt76) ? MT_BAND2 : MT_BAND0;
|
|
u32 size = is_mt7996(&dev->mt76) ? band == MT_BAND2
|
|
? MT7996_NPU_TX_RING_SIZE
|
|
: MT7996_NPU_RX_RING_SIZE / 2
|
|
: MT7996_TX_RING_SIZE;
|
|
|
|
if (!dmam_alloc_coherent(dev->mt76.dma_dev, 256 * size,
|
|
&dev->npu_txd_addr[i], GFP_KERNEL))
|
|
return -ENOMEM;
|
|
|
|
if (!dmam_alloc_coherent(dev->mt76.dma_dev, 256 * size,
|
|
&dev->npu_txd_addr[i + 1],
|
|
GFP_KERNEL))
|
|
return -ENOMEM;
|
|
|
|
if (!dmam_alloc_coherent(dev->mt76.dma_dev, 256 * 1024,
|
|
&dev->npu_txd_addr[i + 2],
|
|
GFP_KERNEL))
|
|
return -ENOMEM;
|
|
}
|
|
|
|
mutex_lock(&dev->mt76.mutex);
|
|
err = __mt7996_npu_hw_init(dev);
|
|
mutex_unlock(&dev->mt76.mutex);
|
|
|
|
return err;
|
|
}
|
|
|
|
int mt7996_npu_hw_stop(struct mt7996_dev *dev)
|
|
{
|
|
struct airoha_npu *npu;
|
|
int i, err = 0;
|
|
u32 info;
|
|
|
|
mutex_lock(&dev->mt76.mutex);
|
|
|
|
npu = rcu_dereference_protected(dev->mt76.mmio.npu, &dev->mt76.mutex);
|
|
if (!npu)
|
|
goto unlock;
|
|
|
|
err = mt76_npu_send_msg(npu, 4, WLAN_FUNC_SET_WAIT_INODE_TXRX_REG_ADDR,
|
|
0, GFP_KERNEL);
|
|
if (err)
|
|
goto unlock;
|
|
|
|
for (i = 0; i < 10; i++) {
|
|
err = mt76_npu_get_msg(npu, 3, WLAN_FUNC_GET_WAIT_NPU_INFO,
|
|
&info, GFP_KERNEL);
|
|
if (!err && !info)
|
|
break;
|
|
|
|
err = -ETIMEDOUT;
|
|
usleep_range(10000, 15000);
|
|
}
|
|
|
|
if (!err)
|
|
err = mt76_npu_send_msg(npu, 6,
|
|
WLAN_FUNC_SET_WAIT_INODE_TXRX_REG_ADDR,
|
|
0, GFP_KERNEL);
|
|
else
|
|
dev_err(dev->mt76.dev, "npu stop failed\n");
|
|
unlock:
|
|
mutex_unlock(&dev->mt76.mutex);
|
|
|
|
return err;
|
|
}
|