mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 21:36:52 +00:00
There really is no need to make drivers call the ieee80211_start_tx_ba_cb_irqsafe() function and then schedule the worker if all we want is to set a bit. Add a new return value (that was previously considered invalid) to indicate that the driver is immediately ready for the session, and make drivers use it. The only drivers that remain different are the Intel ones as they need to negotiate more with the firmware. Link: https://lore.kernel.org/r/1570007543-I152912660131cbab2e5d80b4218238c20f8a06e5@changeid Signed-off-by: Johannes Berg <[email protected]>
730 lines
18 KiB
C
730 lines
18 KiB
C
// SPDX-License-Identifier: ISC
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#include <linux/etherdevice.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <linux/module.h>
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#include "mt7603.h"
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#include "mac.h"
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#include "eeprom.h"
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static int
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mt7603_start(struct ieee80211_hw *hw)
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{
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struct mt7603_dev *dev = hw->priv;
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mt7603_mac_reset_counters(dev);
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mt7603_mac_start(dev);
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dev->mphy.survey_time = ktime_get_boottime();
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set_bit(MT76_STATE_RUNNING, &dev->mphy.state);
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mt7603_mac_work(&dev->mt76.mac_work.work);
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return 0;
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}
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static void
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mt7603_stop(struct ieee80211_hw *hw)
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{
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struct mt7603_dev *dev = hw->priv;
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clear_bit(MT76_STATE_RUNNING, &dev->mphy.state);
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cancel_delayed_work_sync(&dev->mt76.mac_work);
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mt7603_mac_stop(dev);
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}
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static int
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mt7603_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
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{
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struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
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struct mt7603_dev *dev = hw->priv;
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struct mt76_txq *mtxq;
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u8 bc_addr[ETH_ALEN];
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int idx;
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int ret = 0;
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mutex_lock(&dev->mt76.mutex);
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mvif->idx = ffs(~dev->mphy.vif_mask) - 1;
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if (mvif->idx >= MT7603_MAX_INTERFACES) {
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ret = -ENOSPC;
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goto out;
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}
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mt76_wr(dev, MT_MAC_ADDR0(mvif->idx),
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get_unaligned_le32(vif->addr));
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mt76_wr(dev, MT_MAC_ADDR1(mvif->idx),
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(get_unaligned_le16(vif->addr + 4) |
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MT_MAC_ADDR1_VALID));
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if (vif->type == NL80211_IFTYPE_AP) {
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mt76_wr(dev, MT_BSSID0(mvif->idx),
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get_unaligned_le32(vif->addr));
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mt76_wr(dev, MT_BSSID1(mvif->idx),
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(get_unaligned_le16(vif->addr + 4) |
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MT_BSSID1_VALID));
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}
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idx = MT7603_WTBL_RESERVED - 1 - mvif->idx;
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dev->mphy.vif_mask |= BIT(mvif->idx);
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INIT_LIST_HEAD(&mvif->sta.poll_list);
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mvif->sta.wcid.idx = idx;
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mvif->sta.wcid.hw_key_idx = -1;
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eth_broadcast_addr(bc_addr);
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mt7603_wtbl_init(dev, idx, mvif->idx, bc_addr);
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mtxq = (struct mt76_txq *)vif->txq->drv_priv;
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mtxq->wcid = &mvif->sta.wcid;
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mt76_txq_init(&dev->mt76, vif->txq);
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rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid);
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out:
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mutex_unlock(&dev->mt76.mutex);
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return ret;
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}
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static void
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mt7603_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
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{
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struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
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struct mt7603_sta *msta = &mvif->sta;
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struct mt7603_dev *dev = hw->priv;
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int idx = msta->wcid.idx;
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mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 0);
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mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 0);
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mt76_wr(dev, MT_BSSID0(mvif->idx), 0);
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mt76_wr(dev, MT_BSSID1(mvif->idx), 0);
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mt7603_beacon_set_timer(dev, mvif->idx, 0);
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rcu_assign_pointer(dev->mt76.wcid[idx], NULL);
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mt76_txq_remove(&dev->mt76, vif->txq);
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spin_lock_bh(&dev->sta_poll_lock);
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if (!list_empty(&msta->poll_list))
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list_del_init(&msta->poll_list);
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spin_unlock_bh(&dev->sta_poll_lock);
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mutex_lock(&dev->mt76.mutex);
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dev->mphy.vif_mask &= ~BIT(mvif->idx);
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mutex_unlock(&dev->mt76.mutex);
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}
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void mt7603_init_edcca(struct mt7603_dev *dev)
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{
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/* Set lower signal level to -65dBm */
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mt76_rmw_field(dev, MT_RXTD(8), MT_RXTD_8_LOWER_SIGNAL, 0x23);
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/* clear previous energy detect monitor results */
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mt76_rr(dev, MT_MIB_STAT_ED);
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if (dev->ed_monitor)
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mt76_set(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME);
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else
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mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME);
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dev->ed_strict_mode = 0xff;
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dev->ed_strong_signal = 0;
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dev->ed_time = ktime_get_boottime();
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mt7603_edcca_set_strict(dev, false);
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}
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static int
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mt7603_set_channel(struct mt7603_dev *dev, struct cfg80211_chan_def *def)
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{
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u8 *rssi_data = (u8 *)dev->mt76.eeprom.data;
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int idx, ret;
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u8 bw = MT_BW_20;
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bool failed = false;
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cancel_delayed_work_sync(&dev->mt76.mac_work);
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tasklet_disable(&dev->mt76.pre_tbtt_tasklet);
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mutex_lock(&dev->mt76.mutex);
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set_bit(MT76_RESET, &dev->mphy.state);
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mt7603_beacon_set_timer(dev, -1, 0);
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mt76_set_channel(&dev->mphy);
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mt7603_mac_stop(dev);
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if (def->width == NL80211_CHAN_WIDTH_40)
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bw = MT_BW_40;
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dev->mphy.chandef = *def;
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mt76_rmw_field(dev, MT_AGG_BWCR, MT_AGG_BWCR_BW, bw);
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ret = mt7603_mcu_set_channel(dev);
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if (ret) {
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failed = true;
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goto out;
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}
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if (def->chan->band == NL80211_BAND_5GHZ) {
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idx = 1;
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rssi_data += MT_EE_RSSI_OFFSET_5G;
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} else {
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idx = 0;
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rssi_data += MT_EE_RSSI_OFFSET_2G;
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}
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memcpy(dev->rssi_offset, rssi_data, sizeof(dev->rssi_offset));
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idx |= (def->chan -
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mt76_hw(dev)->wiphy->bands[def->chan->band]->channels) << 1;
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mt76_wr(dev, MT_WF_RMAC_CH_FREQ, idx);
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mt7603_mac_set_timing(dev);
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mt7603_mac_start(dev);
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clear_bit(MT76_RESET, &dev->mphy.state);
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mt76_txq_schedule_all(&dev->mphy);
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ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mt76.mac_work,
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msecs_to_jiffies(MT7603_WATCHDOG_TIME));
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/* reset channel stats */
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mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_READ_CLR_DIS);
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mt76_set(dev, MT_MIB_CTL,
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MT_MIB_CTL_CCA_NAV_TX | MT_MIB_CTL_PSCCA_TIME);
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mt76_rr(dev, MT_MIB_STAT_CCA);
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mt7603_cca_stats_reset(dev);
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dev->mphy.survey_time = ktime_get_boottime();
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mt7603_init_edcca(dev);
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out:
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if (!(mt76_hw(dev)->conf.flags & IEEE80211_CONF_OFFCHANNEL))
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mt7603_beacon_set_timer(dev, -1, dev->mt76.beacon_int);
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mutex_unlock(&dev->mt76.mutex);
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tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
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if (failed)
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mt7603_mac_work(&dev->mt76.mac_work.work);
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return ret;
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}
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static int
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mt7603_config(struct ieee80211_hw *hw, u32 changed)
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{
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struct mt7603_dev *dev = hw->priv;
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int ret = 0;
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if (changed & (IEEE80211_CONF_CHANGE_CHANNEL |
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IEEE80211_CONF_CHANGE_POWER)) {
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ieee80211_stop_queues(hw);
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ret = mt7603_set_channel(dev, &hw->conf.chandef);
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ieee80211_wake_queues(hw);
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}
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if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
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mutex_lock(&dev->mt76.mutex);
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if (!(hw->conf.flags & IEEE80211_CONF_MONITOR))
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dev->rxfilter |= MT_WF_RFCR_DROP_OTHER_UC;
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else
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dev->rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC;
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mt76_wr(dev, MT_WF_RFCR, dev->rxfilter);
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mutex_unlock(&dev->mt76.mutex);
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}
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return ret;
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}
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static void
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mt7603_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
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unsigned int *total_flags, u64 multicast)
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{
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struct mt7603_dev *dev = hw->priv;
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u32 flags = 0;
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#define MT76_FILTER(_flag, _hw) do { \
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flags |= *total_flags & FIF_##_flag; \
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dev->rxfilter &= ~(_hw); \
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dev->rxfilter |= !(flags & FIF_##_flag) * (_hw); \
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} while (0)
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dev->rxfilter &= ~(MT_WF_RFCR_DROP_OTHER_BSS |
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MT_WF_RFCR_DROP_OTHER_BEACON |
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MT_WF_RFCR_DROP_FRAME_REPORT |
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MT_WF_RFCR_DROP_PROBEREQ |
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MT_WF_RFCR_DROP_MCAST_FILTERED |
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MT_WF_RFCR_DROP_MCAST |
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MT_WF_RFCR_DROP_BCAST |
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MT_WF_RFCR_DROP_DUPLICATE |
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MT_WF_RFCR_DROP_A2_BSSID |
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MT_WF_RFCR_DROP_UNWANTED_CTL |
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MT_WF_RFCR_DROP_STBC_MULTI);
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MT76_FILTER(OTHER_BSS, MT_WF_RFCR_DROP_OTHER_TIM |
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MT_WF_RFCR_DROP_A3_MAC |
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MT_WF_RFCR_DROP_A3_BSSID);
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MT76_FILTER(FCSFAIL, MT_WF_RFCR_DROP_FCSFAIL);
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MT76_FILTER(CONTROL, MT_WF_RFCR_DROP_CTS |
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MT_WF_RFCR_DROP_RTS |
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MT_WF_RFCR_DROP_CTL_RSV |
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MT_WF_RFCR_DROP_NDPA);
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*total_flags = flags;
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mt76_wr(dev, MT_WF_RFCR, dev->rxfilter);
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}
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static void
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mt7603_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
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struct ieee80211_bss_conf *info, u32 changed)
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{
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struct mt7603_dev *dev = hw->priv;
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struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
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mutex_lock(&dev->mt76.mutex);
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if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BSSID)) {
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if (info->assoc || info->ibss_joined) {
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mt76_wr(dev, MT_BSSID0(mvif->idx),
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get_unaligned_le32(info->bssid));
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mt76_wr(dev, MT_BSSID1(mvif->idx),
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(get_unaligned_le16(info->bssid + 4) |
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MT_BSSID1_VALID));
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} else {
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mt76_wr(dev, MT_BSSID0(mvif->idx), 0);
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mt76_wr(dev, MT_BSSID1(mvif->idx), 0);
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}
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}
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if (changed & BSS_CHANGED_ERP_SLOT) {
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int slottime = info->use_short_slot ? 9 : 20;
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if (slottime != dev->slottime) {
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dev->slottime = slottime;
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mt7603_mac_set_timing(dev);
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}
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}
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if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON_INT)) {
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int beacon_int = !!info->enable_beacon * info->beacon_int;
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tasklet_disable(&dev->mt76.pre_tbtt_tasklet);
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mt7603_beacon_set_timer(dev, mvif->idx, beacon_int);
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tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
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}
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mutex_unlock(&dev->mt76.mutex);
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}
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int
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mt7603_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
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struct ieee80211_sta *sta)
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{
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struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
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struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
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struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
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int idx;
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int ret = 0;
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idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7603_WTBL_STA - 1);
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if (idx < 0)
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return -ENOSPC;
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INIT_LIST_HEAD(&msta->poll_list);
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__skb_queue_head_init(&msta->psq);
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msta->ps = ~0;
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msta->smps = ~0;
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msta->wcid.sta = 1;
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msta->wcid.idx = idx;
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mt7603_wtbl_init(dev, idx, mvif->idx, sta->addr);
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mt7603_wtbl_set_ps(dev, msta, false);
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if (vif->type == NL80211_IFTYPE_AP)
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set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
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return ret;
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}
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void
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mt7603_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif,
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struct ieee80211_sta *sta)
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{
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struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
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mt7603_wtbl_update_cap(dev, sta);
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}
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void
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mt7603_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
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struct ieee80211_sta *sta)
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{
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struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
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struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
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struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
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spin_lock_bh(&dev->ps_lock);
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__skb_queue_purge(&msta->psq);
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mt7603_filter_tx(dev, wcid->idx, true);
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spin_unlock_bh(&dev->ps_lock);
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spin_lock_bh(&dev->sta_poll_lock);
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if (!list_empty(&msta->poll_list))
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list_del_init(&msta->poll_list);
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spin_unlock_bh(&dev->sta_poll_lock);
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mt7603_wtbl_clear(dev, wcid->idx);
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}
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static void
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mt7603_ps_tx_list(struct mt7603_dev *dev, struct sk_buff_head *list)
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{
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struct sk_buff *skb;
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while ((skb = __skb_dequeue(list)) != NULL)
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mt76_tx_queue_skb_raw(dev, skb_get_queue_mapping(skb),
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skb, 0);
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}
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void
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mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps)
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{
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struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
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struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
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struct sk_buff_head list;
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mt76_stop_tx_queues(&dev->mt76, sta, true);
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mt7603_wtbl_set_ps(dev, msta, ps);
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if (ps)
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return;
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__skb_queue_head_init(&list);
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spin_lock_bh(&dev->ps_lock);
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skb_queue_splice_tail_init(&msta->psq, &list);
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spin_unlock_bh(&dev->ps_lock);
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mt7603_ps_tx_list(dev, &list);
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}
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static void
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mt7603_ps_set_more_data(struct sk_buff *skb)
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{
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struct ieee80211_hdr *hdr;
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hdr = (struct ieee80211_hdr *)&skb->data[MT_TXD_SIZE];
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hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
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}
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static void
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mt7603_release_buffered_frames(struct ieee80211_hw *hw,
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struct ieee80211_sta *sta,
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u16 tids, int nframes,
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enum ieee80211_frame_release_type reason,
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bool more_data)
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{
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struct mt7603_dev *dev = hw->priv;
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struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
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struct sk_buff_head list;
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struct sk_buff *skb, *tmp;
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__skb_queue_head_init(&list);
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mt7603_wtbl_set_ps(dev, msta, false);
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spin_lock_bh(&dev->ps_lock);
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skb_queue_walk_safe(&msta->psq, skb, tmp) {
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if (!nframes)
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break;
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if (!(tids & BIT(skb->priority)))
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continue;
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skb_set_queue_mapping(skb, MT_TXQ_PSD);
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__skb_unlink(skb, &msta->psq);
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mt7603_ps_set_more_data(skb);
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__skb_queue_tail(&list, skb);
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nframes--;
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}
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spin_unlock_bh(&dev->ps_lock);
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if (!skb_queue_empty(&list))
|
|
ieee80211_sta_eosp(sta);
|
|
|
|
mt7603_ps_tx_list(dev, &list);
|
|
|
|
if (nframes)
|
|
mt76_release_buffered_frames(hw, sta, tids, nframes, reason,
|
|
more_data);
|
|
}
|
|
|
|
static int
|
|
mt7603_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
|
struct ieee80211_vif *vif, struct ieee80211_sta *sta,
|
|
struct ieee80211_key_conf *key)
|
|
{
|
|
struct mt7603_dev *dev = hw->priv;
|
|
struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
|
|
struct mt7603_sta *msta = sta ? (struct mt7603_sta *)sta->drv_priv :
|
|
&mvif->sta;
|
|
struct mt76_wcid *wcid = &msta->wcid;
|
|
int idx = key->keyidx;
|
|
|
|
/* fall back to sw encryption for unsupported ciphers */
|
|
switch (key->cipher) {
|
|
case WLAN_CIPHER_SUITE_TKIP:
|
|
case WLAN_CIPHER_SUITE_CCMP:
|
|
break;
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
/*
|
|
* The hardware does not support per-STA RX GTK, fall back
|
|
* to software mode for these.
|
|
*/
|
|
if ((vif->type == NL80211_IFTYPE_ADHOC ||
|
|
vif->type == NL80211_IFTYPE_MESH_POINT) &&
|
|
(key->cipher == WLAN_CIPHER_SUITE_TKIP ||
|
|
key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
|
|
!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
|
|
return -EOPNOTSUPP;
|
|
|
|
if (cmd == SET_KEY) {
|
|
key->hw_key_idx = wcid->idx;
|
|
wcid->hw_key_idx = idx;
|
|
} else {
|
|
if (idx == wcid->hw_key_idx)
|
|
wcid->hw_key_idx = -1;
|
|
|
|
key = NULL;
|
|
}
|
|
mt76_wcid_key_setup(&dev->mt76, wcid, key);
|
|
|
|
return mt7603_wtbl_set_key(dev, wcid->idx, key);
|
|
}
|
|
|
|
static int
|
|
mt7603_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue,
|
|
const struct ieee80211_tx_queue_params *params)
|
|
{
|
|
struct mt7603_dev *dev = hw->priv;
|
|
u16 cw_min = (1 << 5) - 1;
|
|
u16 cw_max = (1 << 10) - 1;
|
|
u32 val;
|
|
|
|
queue = dev->mt76.q_tx[queue].q->hw_idx;
|
|
|
|
if (params->cw_min)
|
|
cw_min = params->cw_min;
|
|
if (params->cw_max)
|
|
cw_max = params->cw_max;
|
|
|
|
mutex_lock(&dev->mt76.mutex);
|
|
mt7603_mac_stop(dev);
|
|
|
|
val = mt76_rr(dev, MT_WMM_TXOP(queue));
|
|
val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(queue));
|
|
val |= params->txop << MT_WMM_TXOP_SHIFT(queue);
|
|
mt76_wr(dev, MT_WMM_TXOP(queue), val);
|
|
|
|
val = mt76_rr(dev, MT_WMM_AIFSN);
|
|
val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(queue));
|
|
val |= params->aifs << MT_WMM_AIFSN_SHIFT(queue);
|
|
mt76_wr(dev, MT_WMM_AIFSN, val);
|
|
|
|
val = mt76_rr(dev, MT_WMM_CWMIN);
|
|
val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(queue));
|
|
val |= cw_min << MT_WMM_CWMIN_SHIFT(queue);
|
|
mt76_wr(dev, MT_WMM_CWMIN, val);
|
|
|
|
val = mt76_rr(dev, MT_WMM_CWMAX(queue));
|
|
val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(queue));
|
|
val |= cw_max << MT_WMM_CWMAX_SHIFT(queue);
|
|
mt76_wr(dev, MT_WMM_CWMAX(queue), val);
|
|
|
|
mt7603_mac_start(dev);
|
|
mutex_unlock(&dev->mt76.mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
mt7603_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
|
u32 queues, bool drop)
|
|
{
|
|
}
|
|
|
|
static int
|
|
mt7603_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
|
struct ieee80211_ampdu_params *params)
|
|
{
|
|
enum ieee80211_ampdu_mlme_action action = params->action;
|
|
struct mt7603_dev *dev = hw->priv;
|
|
struct ieee80211_sta *sta = params->sta;
|
|
struct ieee80211_txq *txq = sta->txq[params->tid];
|
|
struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
|
|
u16 tid = params->tid;
|
|
u16 ssn = params->ssn;
|
|
u8 ba_size = params->buf_size;
|
|
struct mt76_txq *mtxq;
|
|
int ret = 0;
|
|
|
|
if (!txq)
|
|
return -EINVAL;
|
|
|
|
mtxq = (struct mt76_txq *)txq->drv_priv;
|
|
|
|
mutex_lock(&dev->mt76.mutex);
|
|
switch (action) {
|
|
case IEEE80211_AMPDU_RX_START:
|
|
mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn,
|
|
params->buf_size);
|
|
mt7603_mac_rx_ba_reset(dev, sta->addr, tid);
|
|
break;
|
|
case IEEE80211_AMPDU_RX_STOP:
|
|
mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
|
|
break;
|
|
case IEEE80211_AMPDU_TX_OPERATIONAL:
|
|
mtxq->aggr = true;
|
|
mtxq->send_bar = false;
|
|
mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, ba_size);
|
|
break;
|
|
case IEEE80211_AMPDU_TX_STOP_FLUSH:
|
|
case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
|
|
mtxq->aggr = false;
|
|
mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1);
|
|
break;
|
|
case IEEE80211_AMPDU_TX_START:
|
|
mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
|
|
ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
|
|
break;
|
|
case IEEE80211_AMPDU_TX_STOP_CONT:
|
|
mtxq->aggr = false;
|
|
mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1);
|
|
ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
|
|
break;
|
|
}
|
|
mutex_unlock(&dev->mt76.mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void
|
|
mt7603_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
|
struct ieee80211_sta *sta)
|
|
{
|
|
struct mt7603_dev *dev = hw->priv;
|
|
struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
|
|
struct ieee80211_sta_rates *sta_rates = rcu_dereference(sta->rates);
|
|
int i;
|
|
|
|
spin_lock_bh(&dev->mt76.lock);
|
|
for (i = 0; i < ARRAY_SIZE(msta->rates); i++) {
|
|
msta->rates[i].idx = sta_rates->rate[i].idx;
|
|
msta->rates[i].count = sta_rates->rate[i].count;
|
|
msta->rates[i].flags = sta_rates->rate[i].flags;
|
|
|
|
if (msta->rates[i].idx < 0 || !msta->rates[i].count)
|
|
break;
|
|
}
|
|
msta->n_rates = i;
|
|
mt7603_wtbl_set_rates(dev, msta, NULL, msta->rates);
|
|
msta->rate_probe = false;
|
|
mt7603_wtbl_set_smps(dev, msta,
|
|
sta->smps_mode == IEEE80211_SMPS_DYNAMIC);
|
|
spin_unlock_bh(&dev->mt76.lock);
|
|
}
|
|
|
|
static void
|
|
mt7603_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
|
|
{
|
|
struct mt7603_dev *dev = hw->priv;
|
|
|
|
mutex_lock(&dev->mt76.mutex);
|
|
dev->coverage_class = max_t(s16, coverage_class, 0);
|
|
mt7603_mac_set_timing(dev);
|
|
mutex_unlock(&dev->mt76.mutex);
|
|
}
|
|
|
|
static void mt7603_tx(struct ieee80211_hw *hw,
|
|
struct ieee80211_tx_control *control,
|
|
struct sk_buff *skb)
|
|
{
|
|
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
|
struct ieee80211_vif *vif = info->control.vif;
|
|
struct mt7603_dev *dev = hw->priv;
|
|
struct mt76_wcid *wcid = &dev->global_sta.wcid;
|
|
|
|
if (control->sta) {
|
|
struct mt7603_sta *msta;
|
|
|
|
msta = (struct mt7603_sta *)control->sta->drv_priv;
|
|
wcid = &msta->wcid;
|
|
} else if (vif) {
|
|
struct mt7603_vif *mvif;
|
|
|
|
mvif = (struct mt7603_vif *)vif->drv_priv;
|
|
wcid = &mvif->sta.wcid;
|
|
}
|
|
|
|
mt76_tx(&dev->mphy, control->sta, wcid, skb);
|
|
}
|
|
|
|
const struct ieee80211_ops mt7603_ops = {
|
|
.tx = mt7603_tx,
|
|
.start = mt7603_start,
|
|
.stop = mt7603_stop,
|
|
.add_interface = mt7603_add_interface,
|
|
.remove_interface = mt7603_remove_interface,
|
|
.config = mt7603_config,
|
|
.configure_filter = mt7603_configure_filter,
|
|
.bss_info_changed = mt7603_bss_info_changed,
|
|
.sta_state = mt76_sta_state,
|
|
.sta_pre_rcu_remove = mt76_sta_pre_rcu_remove,
|
|
.set_key = mt7603_set_key,
|
|
.conf_tx = mt7603_conf_tx,
|
|
.sw_scan_start = mt76_sw_scan,
|
|
.sw_scan_complete = mt76_sw_scan_complete,
|
|
.flush = mt7603_flush,
|
|
.ampdu_action = mt7603_ampdu_action,
|
|
.get_txpower = mt76_get_txpower,
|
|
.wake_tx_queue = mt76_wake_tx_queue,
|
|
.sta_rate_tbl_update = mt7603_sta_rate_tbl_update,
|
|
.release_buffered_frames = mt7603_release_buffered_frames,
|
|
.set_coverage_class = mt7603_set_coverage_class,
|
|
.set_tim = mt76_set_tim,
|
|
.get_survey = mt76_get_survey,
|
|
.get_antenna = mt76_get_antenna,
|
|
};
|
|
|
|
MODULE_LICENSE("Dual BSD/GPL");
|
|
|
|
static int __init mt7603_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = platform_driver_register(&mt76_wmac_driver);
|
|
if (ret)
|
|
return ret;
|
|
|
|
#ifdef CONFIG_PCI
|
|
ret = pci_register_driver(&mt7603_pci_driver);
|
|
if (ret)
|
|
platform_driver_unregister(&mt76_wmac_driver);
|
|
#endif
|
|
return ret;
|
|
}
|
|
|
|
static void __exit mt7603_exit(void)
|
|
{
|
|
#ifdef CONFIG_PCI
|
|
pci_unregister_driver(&mt7603_pci_driver);
|
|
#endif
|
|
platform_driver_unregister(&mt76_wmac_driver);
|
|
}
|
|
|
|
module_init(mt7603_init);
|
|
module_exit(mt7603_exit);
|