mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 13:26:48 +00:00
388 lines
9.1 KiB
C
388 lines
9.1 KiB
C
/*
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* Copyright (C) 2014 Felix Fietkau <[email protected]>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MT76x2_H
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#define __MT76x2_H
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/dma-mapping.h>
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#include <linux/spinlock.h>
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#include <linux/skbuff.h>
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#include <linux/netdevice.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include <linux/bitops.h>
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#include <linux/kfifo.h>
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#include <net/mac80211.h>
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#define MT7662_FIRMWARE "mt7662.bin"
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#define MT7662_ROM_PATCH "mt7662_rom_patch.bin"
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#define MT7662_EEPROM_SIZE 512
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#define MT_RX_BUF_SIZE 2048
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#define MT_RX_HEADROOM 32
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#define MT_RX_RING_SIZE 128
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#define MT_TX_RING_SIZE 128
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#define MT_MCU_RING_SIZE 32
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#define MT_MAX_CHAINS 2
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#define MT_CALIBRATE_INTERVAL HZ
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#include "mt76x2_regs.h"
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#include "util.h"
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#include "mt76x2_mac.h"
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struct mt76x2_queue_entry {
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struct sk_buff *skb;
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union {
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void *buf;
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struct mt76x2_txwi_cache *txwi;
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};
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bool schedule;
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};
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enum {
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MT76_STATE_INITIALIZED,
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MT76_STATE_RUNNING,
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MT76_SCANNING,
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};
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enum mt76x2_txq_id {
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MT_TXQ_VO = IEEE80211_AC_VO,
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MT_TXQ_VI = IEEE80211_AC_VI,
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MT_TXQ_BE = IEEE80211_AC_BE,
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MT_TXQ_BK = IEEE80211_AC_BK,
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MT_TXQ_PSD,
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MT_TXQ_MCU,
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__MT_TXQ_MAX
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};
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struct mt76x2_queue {
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struct mt76x2_queue_regs __iomem *regs;
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spinlock_t lock;
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struct mt76x2_queue_entry *entry;
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struct mt76x2_desc *desc;
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struct list_head swq;
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int swq_queued;
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u16 head;
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u16 tail;
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int ndesc;
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int queued;
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int buf_size;
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dma_addr_t desc_dma;
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};
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struct mt76x2_mcu {
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struct mutex mutex;
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wait_queue_head_t wait;
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struct sk_buff_head res_q;
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struct mt76x2_queue q_rx;
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u32 msg_seq;
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};
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struct mt76x2_rx_freq_cal {
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s8 high_gain[MT_MAX_CHAINS];
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s8 rssi_offset[MT_MAX_CHAINS];
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s8 lna_gain;
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u32 mcu_gain;
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};
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struct mt76x2_calibration {
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struct mt76x2_rx_freq_cal rx;
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u8 agc_gain_init[MT_MAX_CHAINS];
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int avg_rssi[MT_MAX_CHAINS];
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int avg_rssi_all;
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s8 low_gain;
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u8 temp;
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bool init_cal_done;
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bool tssi_cal_done;
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bool tssi_comp_pending;
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bool dpd_cal_done;
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bool channel_cal_done;
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};
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struct mt76x2_wcid {
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u8 idx;
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u8 hw_key_idx;
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__le16 tx_rate;
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bool tx_rate_set;
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u8 tx_rate_nss;
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};
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struct mt76x2_hw_cap {
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bool has_2ghz;
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bool has_5ghz;
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};
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struct mt76x2_rate_power {
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union {
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struct {
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s8 cck[4];
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s8 ofdm[8];
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s8 ht[16];
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s8 vht[10];
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};
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s8 all[38];
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};
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};
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struct mt76x2_dma_ops {
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int (*queue_skb)(struct mt76x2_dev *dev, struct mt76x2_queue *q,
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struct sk_buff *skb, struct mt76x2_wcid *wcid,
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struct ieee80211_sta *sta);
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int (*queue_mcu)(struct mt76x2_dev *dev, enum mt76x2_txq_id qid,
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struct sk_buff *skb, int cmd, int seq);
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void (*cleanup_idx)(struct mt76x2_dev *dev, struct mt76x2_queue *q, int idx,
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bool flush, bool *schedule);
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int (*add_rx_buf)(struct mt76x2_dev *dev, struct mt76x2_queue *q,
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dma_addr_t addr, int len);
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};
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struct mt76x2_dev {
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struct ieee80211_hw *hw;
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struct device *dev;
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u8 macaddr[ETH_ALEN];
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struct mac_address macaddr_list[8];
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void __iomem *regs;
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struct mutex mutex;
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const struct mt76x2_dma_ops *dma_ops;
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const u16 *beacon_offsets;
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unsigned long wcid_mask[256 / BITS_PER_LONG];
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struct cfg80211_chan_def chandef;
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struct ieee80211_supported_band sband_2g;
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struct ieee80211_supported_band sband_5g;
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int txpower_conf;
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int txpower_cur;
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u8 txdone_seq;
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DECLARE_KFIFO_PTR(txstatus_fifo, struct mt76x2_tx_status);
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struct list_head txwi_cache;
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struct mt76x2_mcu mcu;
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struct mt76x2_queue q_rx;
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struct mt76x2_queue q_tx[__MT_TXQ_MAX];
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struct net_device napi_dev;
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struct napi_struct napi;
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struct tasklet_struct tx_tasklet;
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struct tasklet_struct rx_tasklet;
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struct tasklet_struct pre_tbtt_tasklet;
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struct delayed_work cal_work;
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struct delayed_work mac_work;
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u32 aggr_stats[32];
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struct mt76x2_wcid __rcu *wcid[254 - 8];
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spinlock_t lock;
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spinlock_t irq_lock;
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u32 irqmask;
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unsigned long state;
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struct sk_buff *beacons[8];
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u8 beacon_mask;
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u8 beacon_data_mask;
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u32 rev;
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u32 rxfilter;
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u16 chainmask;
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struct mt76x2_calibration cal;
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struct debugfs_blob_wrapper eeprom;
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struct debugfs_blob_wrapper otp;
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struct mt76x2_hw_cap cap;
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u32 debugfs_reg;
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s8 target_power;
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s8 target_power_delta[2];
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struct mt76x2_rate_power rate_power;
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u8 coverage_class;
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u8 slottime;
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};
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struct mt76x2_vif {
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u8 idx;
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struct mt76x2_wcid group_wcid;
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};
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struct mt76x2_sta {
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struct mt76x2_wcid wcid;
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struct mt76x2_tx_status status;
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int n_frames;
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bool sleeping;
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};
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struct mt76x2_txq {
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struct list_head list;
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struct mt76x2_queue *hwq;
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struct sk_buff_head retry_q;
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u16 agg_ssn;
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bool send_bar;
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bool aggr;
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};
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struct mt76x2_reg_pair {
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u32 reg;
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u32 value;
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};
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u32 mt76x2_rr(struct mt76x2_dev *dev, u32 offset);
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void mt76x2_wr(struct mt76x2_dev *dev, u32 offset, u32 val);
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u32 mt76x2_rmw(struct mt76x2_dev *dev, u32 offset, u32 mask, u32 val);
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void mt76x2_wr_copy(struct mt76x2_dev *dev, u32 offset, const void *data, int len);
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bool mt76x2_poll(struct mt76x2_dev *dev, u32 offset, u32 mask, u32 val,
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int timeout);
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bool mt76x2_poll_msec(struct mt76x2_dev *dev, u32 offset, u32 mask, u32 val,
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int timeout);
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void mt76x2_write_reg_pairs(struct mt76x2_dev *dev,
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const struct mt76x2_reg_pair *data, int len);
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#define mt76x2_get_field(_dev, _reg, _field) \
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MT76_GET(_field, mt76x2_rr(dev, _reg))
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#define mt76x2_rmw_field(_dev, _reg, _field, _val) \
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mt76x2_rmw(_dev, _reg, _field, MT76_SET(_field, _val))
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static inline u32 mt76x2_set(struct mt76x2_dev *dev, u32 offset, u32 val)
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{
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return mt76x2_rmw(dev, offset, 0, val);
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}
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static inline u32 mt76x2_clear(struct mt76x2_dev *dev, u32 offset, u32 val)
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{
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return mt76x2_rmw(dev, offset, val, 0);
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}
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static inline bool is_mt7612(struct mt76x2_dev *dev)
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{
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return (dev->rev >> 16) == 0x7612;
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}
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static inline u16 mt76xx_rev(struct mt76x2_dev *dev)
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{
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return dev->rev & 0xffff;
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}
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void mt76x2_set_irq_mask(struct mt76x2_dev *dev, u32 clear, u32 set);
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static inline void mt76x2_irq_enable(struct mt76x2_dev *dev, u32 mask)
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{
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mt76x2_set_irq_mask(dev, 0, mask);
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}
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static inline void mt76x2_irq_disable(struct mt76x2_dev *dev, u32 mask)
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{
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mt76x2_set_irq_mask(dev, mask, 0);
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}
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static inline struct ieee80211_txq *
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mtxq_to_txq(struct mt76x2_txq *mtxq)
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{
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void *ptr = mtxq;
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return container_of(ptr, struct ieee80211_txq, drv_priv);
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}
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extern const struct ieee80211_ops mt76x2_ops;
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struct mt76x2_dev *mt76x2_alloc_device(struct device *pdev);
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int mt76x2_register_device(struct mt76x2_dev *dev);
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void mt76x2_init_debugfs(struct mt76x2_dev *dev);
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irqreturn_t mt76x2_irq_handler(int irq, void *dev_instance);
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void mt76x2_phy_power_on(struct mt76x2_dev *dev);
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int mt76x2_init_hardware(struct mt76x2_dev *dev);
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void mt76x2_stop_hardware(struct mt76x2_dev *dev);
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int mt76x2_eeprom_init(struct mt76x2_dev *dev);
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int mt76x2_apply_calibration_data(struct mt76x2_dev *dev, int channel);
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void mt76x2_set_tx_ackto(struct mt76x2_dev *dev);
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int mt76x2_phy_start(struct mt76x2_dev *dev);
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int mt76x2_set_channel(struct mt76x2_dev *dev, struct cfg80211_chan_def *chandef);
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int mt76x2_phy_set_channel(struct mt76x2_dev *dev,
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struct cfg80211_chan_def *chandef);
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int mt76x2_phy_get_rssi(struct mt76x2_dev *dev, s8 rssi, int chain);
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void mt76x2_phy_calibrate(struct work_struct *work);
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void mt76x2_phy_set_txpower(struct mt76x2_dev *dev);
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int mt76x2_mcu_init(struct mt76x2_dev *dev);
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int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw, u8 bw_index,
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bool scan);
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int mt76x2_mcu_set_radio_state(struct mt76x2_dev *dev, bool on);
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int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level, u8 channel);
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int mt76x2_mcu_cleanup(struct mt76x2_dev *dev);
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int mt76x2_dma_init(struct mt76x2_dev *dev);
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void mt76x2_dma_cleanup(struct mt76x2_dev *dev);
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void mt76x2_cleanup(struct mt76x2_dev *dev);
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void mt76x2_rx(struct mt76x2_dev *dev, struct sk_buff *skb);
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#define mt76x2_tx_queue_skb(dev, ...) dev->dma_ops->queue_skb(dev, __VA_ARGS__)
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#define mt76x2_tx_queue_mcu(dev, ...) dev->dma_ops->queue_mcu(dev, __VA_ARGS__)
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void mt76x2_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
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struct sk_buff *skb);
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void mt76x2_tx_complete(struct mt76x2_dev *dev, struct sk_buff *skb);
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void mt76x2_kick_queue(struct mt76x2_dev *dev, struct mt76x2_queue *q);
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void mt76x2_pre_tbtt_tasklet(unsigned long data);
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void mt76x2_txq_init(struct mt76x2_dev *dev, struct ieee80211_txq *txq);
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void mt76x2_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq);
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void mt76x2_txq_remove(struct mt76x2_dev *dev, struct ieee80211_txq *txq);
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void mt76x2_txq_schedule(struct mt76x2_dev *dev, struct mt76x2_queue *hwq);
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void mt76x2_release_buffered_frames(struct ieee80211_hw *hw,
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struct ieee80211_sta *sta,
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u16 tids, int nframes,
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enum ieee80211_frame_release_type reason,
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bool more_data);
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void mt76x2_stop_tx_queues(struct mt76x2_dev *dev, struct ieee80211_sta *sta);
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#endif
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