mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 13:26:48 +00:00
326 lines
7.5 KiB
C
326 lines
7.5 KiB
C
/*
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* Copyright (C) 2014 Felix Fietkau <[email protected]>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "mt76x2.h"
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#include "mt76x2_dma.h"
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int
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mt76x2_tx_queue_mcu(struct mt76x2_dev *dev, enum mt76_txq_id qid,
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struct sk_buff *skb, int cmd, int seq)
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{
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struct mt76_queue *q = &dev->mt76.q_tx[qid];
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dma_addr_t addr;
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u32 tx_info;
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int idx;
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tx_info = MT_MCU_MSG_TYPE_CMD |
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MT76_SET(MT_MCU_MSG_CMD_TYPE, cmd) |
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MT76_SET(MT_MCU_MSG_CMD_SEQ, seq) |
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MT76_SET(MT_MCU_MSG_PORT, CPU_TX_PORT) |
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MT76_SET(MT_MCU_MSG_LEN, skb->len);
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addr = dma_map_single(dev->mt76.dev, skb->data, skb->len, DMA_TO_DEVICE);
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if (dma_mapping_error(dev->mt76.dev, addr))
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return -ENOMEM;
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spin_lock_bh(&q->lock);
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idx = mt76_queue_add_buf(dev, q, addr, skb->len, 0, 0, tx_info);
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q->entry[idx].skb = skb;
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mt76_queue_kick(dev, q);
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spin_unlock_bh(&q->lock);
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return 0;
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}
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int
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mt76x2_tx_queue_skb(struct mt76_dev *cdev, struct mt76_queue *q,
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struct sk_buff *skb, struct mt76_txwi_cache *t,
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struct mt76_wcid *wcid, struct ieee80211_sta *sta)
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{
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struct mt76x2_dev *dev = container_of(cdev, struct mt76x2_dev, mt76);
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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dma_addr_t addr;
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u32 tx_info = 0;
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int idx, ret, len;
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int qsel = MT_QSEL_EDCA;
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ret = mt76_insert_hdr_pad(skb);
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if (ret)
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return ret;
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if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
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qsel = 0;
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len = skb->len + sizeof(struct mt76x2_txwi);
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len += mt76x2_mac_skb_tx_overhead(dev, skb);
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tx_info = MT76_SET(MT_TXD_INFO_LEN, len) |
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MT76_SET(MT_TXD_INFO_QSEL, qsel) |
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MT_TXD_INFO_80211;
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if (!wcid || wcid->hw_key_idx == 0xff)
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tx_info |= MT_TXD_INFO_WIV;
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addr = dma_map_single(dev->mt76.dev, skb->data, skb->len, DMA_TO_DEVICE);
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if (dma_mapping_error(dev->mt76.dev, addr))
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return -ENOMEM;
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idx = mt76_queue_add_buf(dev, q, t->dma_addr, sizeof(struct mt76x2_txwi),
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addr, skb->len, tx_info);
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q->entry[idx].skb = skb;
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q->entry[idx].txwi = t;
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return idx;
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}
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static void
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mt76x2_tx_cleanup_entry(struct mt76_dev *mdev, struct mt76_queue *q,
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struct mt76_queue_entry *e)
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{
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struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
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if (e->txwi) {
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mt76x2_mac_queue_txdone(dev, e->skb, &e->txwi->txwi);
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} else {
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dev_kfree_skb_any(e->skb);
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}
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}
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static void
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mt76x2_tx_cleanup(struct mt76x2_dev *dev, struct mt76_queue *q, bool flush)
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{
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if (!q->desc)
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return;
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mt76_queue_tx_cleanup(dev, q, flush, mt76x2_tx_cleanup_entry);
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}
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static int
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mt76x2_init_tx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
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int idx, int n_desc)
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{
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int ret;
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q->regs = dev->mt76.regs + MT_TX_RING_BASE + idx * MT_RING_SIZE;
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q->ndesc = n_desc;
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ret = mt76_queue_alloc(dev, q);
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if (ret)
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return ret;
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mt76x2_irq_enable(dev, MT_INT_TX_DONE(idx));
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return 0;
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}
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static void
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mt76x2_process_rx_skb(struct mt76x2_dev *dev, struct mt76_queue *q,
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struct sk_buff *skb, u32 info)
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{
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void *rxwi = skb->data - sizeof(struct mt76x2_rxwi);
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if (q == &dev->mcu.q_rx) {
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u32 *rxfce;
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/* No RXWI header, data starts with payload */
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skb_push(skb, sizeof(struct mt76x2_rxwi));
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rxfce = (u32 *) skb->cb;
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*rxfce = info;
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skb_queue_tail(&dev->mcu.res_q, skb);
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wake_up(&dev->mcu.wait);
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return;
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}
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if (mt76x2_mac_process_rx(dev, skb, rxwi)) {
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dev_kfree_skb(skb);
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return;
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}
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mt76x2_rx(dev, skb);
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}
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static int
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mt76x2_process_rx_queue(struct mt76x2_dev *dev, struct mt76_queue *q, int budget)
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{
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struct sk_buff *skb;
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unsigned char *data;
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int len;
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int done = 0;
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bool napi = q == &dev->q_rx;
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bool more;
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while (done < budget) {
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u32 info;
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data = mt76_queue_dequeue(dev, q, false, &len, &info, &more);
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if (!data)
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break;
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skb = build_skb(data, q->buf_size);
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if (!skb) {
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skb_free_frag(data);
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continue;
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}
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skb_reserve(skb, MT_RX_HEADROOM);
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if (skb->tail + len > skb->end) {
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dev_kfree_skb(skb);
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continue;
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}
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__skb_put(skb, len);
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mt76x2_process_rx_skb(dev, q, skb, info);
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done++;
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}
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mt76_queue_rx_fill(dev, q, napi);
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return done;
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}
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static int
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mt76x2_init_rx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
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int idx, int n_desc, int bufsize)
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{
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int ret;
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q->regs = dev->mt76.regs + MT_RX_RING_BASE + idx * MT_RING_SIZE;
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q->ndesc = n_desc;
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q->buf_size = bufsize;
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ret = mt76_queue_alloc(dev, q);
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if (ret)
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return ret;
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mt76x2_irq_enable(dev, MT_INT_RX_DONE(idx));
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return 0;
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}
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static void
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mt76x2_tx_tasklet(unsigned long data)
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{
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struct mt76x2_dev *dev = (struct mt76x2_dev *) data;
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int i;
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mt76x2_mac_process_tx_status_fifo(dev);
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for (i = ARRAY_SIZE(dev->mt76.q_tx) - 1; i >= 0; i--)
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mt76x2_tx_cleanup(dev, &dev->mt76.q_tx[i], false);
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mt76x2_mac_poll_tx_status(dev, false);
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mt76x2_irq_enable(dev, MT_INT_TX_DONE_ALL);
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}
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static int
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mt76x2_dma_rx_poll(struct napi_struct *napi, int budget)
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{
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struct mt76x2_dev *dev = container_of(napi, struct mt76x2_dev, napi);
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int done;
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done = mt76x2_process_rx_queue(dev, &dev->q_rx, budget);
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if (done < budget) {
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napi_complete(napi);
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mt76x2_irq_enable(dev, MT_INT_RX_DONE(0));
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}
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return done;
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}
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static void
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mt76x2_rx_tasklet(unsigned long data)
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{
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struct mt76x2_dev *dev = (struct mt76x2_dev *) data;
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mt76x2_process_rx_queue(dev, &dev->mcu.q_rx, dev->mcu.q_rx.ndesc);
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mt76x2_irq_enable(dev, MT_INT_RX_DONE(1));
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}
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int mt76x2_dma_init(struct mt76x2_dev *dev)
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{
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static const u8 wmm_queue_map[] = {
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[IEEE80211_AC_BE] = 0,
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[IEEE80211_AC_BK] = 1,
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[IEEE80211_AC_VI] = 2,
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[IEEE80211_AC_VO] = 3,
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};
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int ret;
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int i;
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struct mt76_txwi_cache __maybe_unused *t;
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BUILD_BUG_ON(sizeof(t->txwi) < sizeof(struct mt76x2_txwi));
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BUILD_BUG_ON(sizeof(struct mt76x2_rxwi) > MT_RX_HEADROOM);
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mt76_dma_init(&dev->mt76);
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init_waitqueue_head(&dev->mcu.wait);
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skb_queue_head_init(&dev->mcu.res_q);
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init_dummy_netdev(&dev->napi_dev);
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netif_napi_add(&dev->napi_dev, &dev->napi, mt76x2_dma_rx_poll, 64);
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tasklet_init(&dev->tx_tasklet, mt76x2_tx_tasklet, (unsigned long) dev);
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tasklet_init(&dev->rx_tasklet, mt76x2_rx_tasklet, (unsigned long) dev);
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mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
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for (i = 0; i < ARRAY_SIZE(wmm_queue_map); i++) {
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ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[i], wmm_queue_map[i],
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MT_TX_RING_SIZE);
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if (ret)
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return ret;
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}
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ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_PSD],
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MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE);
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if (ret)
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return ret;
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ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_MCU],
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MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
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if (ret)
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return ret;
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dev->q_rx.buf_offset = MT_RX_HEADROOM - sizeof(struct mt76x2_rxwi);
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dev->mcu.q_rx.buf_offset = MT_RX_HEADROOM - sizeof(struct mt76x2_rxwi);
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ret = mt76x2_init_rx_queue(dev, &dev->mcu.q_rx, 1, MT_MCU_RING_SIZE,
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MT_RX_BUF_SIZE);
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if (ret)
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return ret;
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ret = mt76x2_init_rx_queue(dev, &dev->q_rx, 0,
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MT_RX_RING_SIZE, MT_RX_BUF_SIZE);
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if (ret)
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return ret;
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mt76_queue_rx_fill(dev, &dev->q_rx, false);
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mt76_queue_rx_fill(dev, &dev->mcu.q_rx, false);
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return 0;
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}
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void mt76x2_dma_cleanup(struct mt76x2_dev *dev)
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{
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int i;
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tasklet_kill(&dev->tx_tasklet);
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tasklet_kill(&dev->rx_tasklet);
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for (i = 0; i < ARRAY_SIZE(dev->mt76.q_tx); i++)
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mt76x2_tx_cleanup(dev, &dev->mt76.q_tx[i], true);
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mt76_queue_rx_cleanup(dev, &dev->q_rx);
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mt76_queue_rx_cleanup(dev, &dev->mcu.q_rx);
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}
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