mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 13:26:48 +00:00
Lorenzo BianconiandFelix Fietkau
149e95f5d7
Since mt76_connac_fw_txp struct is shared between mt7615e, mt7915e and mt7921e, move it in mt76_connac module. Signed-off-by: Lorenzo Bianconi <[email protected]> Signed-off-by: Felix Fietkau <[email protected]>
103 lines
2.2 KiB
C
103 lines
2.2 KiB
C
/* SPDX-License-Identifier: ISC */
|
|
/* Copyright (C) 2020 MediaTek Inc. */
|
|
|
|
#ifndef __MT7921_MAC_H
|
|
#define __MT7921_MAC_H
|
|
|
|
#include "../mt76_connac2_mac.h"
|
|
|
|
#define MT_CT_PARSE_LEN 72
|
|
#define MT_CT_DMA_BUF_NUM 2
|
|
|
|
#define MT_RXD0_LENGTH GENMASK(15, 0)
|
|
#define MT_RXD0_PKT_FLAG GENMASK(19, 16)
|
|
#define MT_RXD0_PKT_TYPE GENMASK(31, 27)
|
|
|
|
#define MT_RXD0_NORMAL_ETH_TYPE_OFS GENMASK(22, 16)
|
|
#define MT_RXD0_NORMAL_IP_SUM BIT(23)
|
|
#define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24)
|
|
|
|
enum rx_pkt_type {
|
|
PKT_TYPE_TXS,
|
|
PKT_TYPE_TXRXV,
|
|
PKT_TYPE_NORMAL,
|
|
PKT_TYPE_RX_DUP_RFB,
|
|
PKT_TYPE_RX_TMR,
|
|
PKT_TYPE_RETRIEVE,
|
|
PKT_TYPE_TXRX_NOTIFY,
|
|
PKT_TYPE_RX_EVENT,
|
|
PKT_TYPE_NORMAL_MCU,
|
|
};
|
|
|
|
enum tx_port_idx {
|
|
MT_TX_PORT_IDX_LMAC,
|
|
MT_TX_PORT_IDX_MCU
|
|
};
|
|
|
|
enum tx_mcu_port_q_idx {
|
|
MT_TX_MCU_PORT_RX_Q0 = 0x20,
|
|
MT_TX_MCU_PORT_RX_Q1,
|
|
MT_TX_MCU_PORT_RX_Q2,
|
|
MT_TX_MCU_PORT_RX_Q3,
|
|
MT_TX_MCU_PORT_RX_FWDL = 0x3e
|
|
};
|
|
|
|
struct mt7921_tx_free {
|
|
__le16 rx_byte_cnt;
|
|
__le16 ctrl;
|
|
u8 txd_cnt;
|
|
u8 rsv[3];
|
|
__le32 info[];
|
|
} __packed __aligned(4);
|
|
|
|
#define MT_TX_FREE_MSDU_CNT GENMASK(9, 0)
|
|
#define MT_TX_FREE_WLAN_ID GENMASK(23, 14)
|
|
#define MT_TX_FREE_LATENCY GENMASK(12, 0)
|
|
/* 0: success, others: dropped */
|
|
#define MT_TX_FREE_STATUS GENMASK(14, 13)
|
|
#define MT_TX_FREE_MSDU_ID GENMASK(30, 16)
|
|
#define MT_TX_FREE_PAIR BIT(31)
|
|
/* will support this field in further revision */
|
|
#define MT_TX_FREE_RATE GENMASK(13, 0)
|
|
|
|
#define MT_HW_TXP_MAX_MSDU_NUM 4
|
|
#define MT_HW_TXP_MAX_BUF_NUM 4
|
|
|
|
#define MT_MSDU_ID_VALID BIT(15)
|
|
|
|
#define MT_TXD_LEN_MASK GENMASK(11, 0)
|
|
#define MT_TXD_LEN_MSDU_LAST BIT(14)
|
|
#define MT_TXD_LEN_AMSDU_LAST BIT(15)
|
|
#define MT_TXD_LEN_LAST BIT(15)
|
|
|
|
struct mt7921_txp_ptr {
|
|
__le32 buf0;
|
|
__le16 len0;
|
|
__le16 len1;
|
|
__le32 buf1;
|
|
} __packed __aligned(4);
|
|
|
|
struct mt7921_hw_txp {
|
|
__le16 msdu_id[MT_HW_TXP_MAX_MSDU_NUM];
|
|
struct mt7921_txp_ptr ptr[MT_HW_TXP_MAX_BUF_NUM / 2];
|
|
} __packed __aligned(4);
|
|
|
|
struct mt7921_txp_common {
|
|
union {
|
|
struct mt7921_hw_txp hw;
|
|
};
|
|
};
|
|
|
|
#define MT_WTBL_TXRX_CAP_RATE_OFFSET 7
|
|
#define MT_WTBL_TXRX_RATE_G2_HE 24
|
|
#define MT_WTBL_TXRX_RATE_G2 12
|
|
|
|
#define MT_WTBL_AC0_CTT_OFFSET 20
|
|
|
|
static inline u32 mt7921_mac_wtbl_lmac_addr(int idx, u8 offset)
|
|
{
|
|
return MT_WTBL_LMAC_OFFS(idx, 0) + offset * 4;
|
|
}
|
|
|
|
#endif
|