mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 13:26:48 +00:00
300 lines
6.8 KiB
C
300 lines
6.8 KiB
C
/*
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* Copyright (C) 2014 Felix Fietkau <[email protected]>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "mt7603.h"
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#include "mt7603_mac.h"
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#include "dma.h"
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int
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mt7603_tx_queue_mcu(struct mt7603_dev *dev, enum mt76_txq_id qid,
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struct sk_buff *skb)
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{
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struct mt76_queue *q = &dev->mt76.q_tx[qid];
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dma_addr_t addr;
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int idx;
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addr = dma_map_single(dev->mt76.dev, skb->data, skb->len, DMA_TO_DEVICE);
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if (dma_mapping_error(dev->mt76.dev, addr))
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return -ENOMEM;
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spin_lock_bh(&q->lock);
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idx = mt76_queue_add_buf(dev, q, addr, skb->len, 0, 0, 0);
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q->entry[idx].skb = skb;
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mt76_queue_kick(dev, q);
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spin_unlock_bh(&q->lock);
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return 0;
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}
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int
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mt7603_tx_queue_skb(struct mt76_dev *cdev, struct mt76_queue *q,
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struct sk_buff *skb, struct mt76_txwi_cache *t,
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struct mt76_wcid *wcid, struct ieee80211_sta *sta)
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{
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struct mt7603_dev *dev = container_of(cdev, struct mt7603_dev, mt76);
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dma_addr_t addr;
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int idx;
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addr = dma_map_single(dev->mt76.dev, skb->data, skb->len, DMA_TO_DEVICE);
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if (dma_mapping_error(dev->mt76.dev, addr))
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return -ENOMEM;
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idx = mt76_queue_add_buf(dev, q, t->dma_addr, MT_TXD_SIZE,
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addr, skb->len, 0);
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q->entry[idx].skb = skb;
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q->entry[idx].txwi = t;
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return idx;
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}
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static void
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mt7603_tx_cleanup_entry(struct mt76_dev *mdev, struct mt76_queue *q,
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struct mt76_queue_entry *e)
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{
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struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
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(void) dev;
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dev_kfree_skb_any(e->skb);
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}
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static void
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mt7603_tx_cleanup(struct mt7603_dev *dev, struct mt76_queue *q, bool flush)
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{
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mt76_queue_tx_cleanup(dev, q, flush, mt7603_tx_cleanup_entry);
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}
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static int
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mt7603_init_tx_queue(struct mt7603_dev *dev, struct mt76_queue *q,
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int idx, int n_desc)
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{
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int ret;
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q->regs = dev->mt76.regs + MT_TX_RING_BASE + idx * MT_RING_SIZE;
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q->ndesc = n_desc;
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ret = mt76_queue_alloc(dev, q);
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if (ret)
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return ret;
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mt7603_irq_enable(dev, MT_INT_TX_DONE(idx));
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return 0;
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}
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static void
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mt7603_process_rx_skb(struct mt7603_dev *dev, struct mt76_queue *q,
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struct sk_buff *skb)
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{
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__le32 *rxd = (__le32 *) skb->data;
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enum rx_pkt_type type;
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type = MT76_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0]));
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switch(type) {
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case PKT_TYPE_RX_EVENT:
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skb_queue_tail(&dev->mcu.res_q, skb);
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wake_up(&dev->mcu.wait);
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return;
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case PKT_TYPE_NORMAL:
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if (mt7603_mac_fill_rx(dev, skb) == 0) {
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ieee80211_rx(mt76_hw(dev), skb);
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return;
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}
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/* fall through */
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default:
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dev_kfree_skb(skb);
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}
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}
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static int
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mt7603_process_rx_queue(struct mt7603_dev *dev, struct mt76_queue *q, int budget)
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{
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struct sk_buff *skb;
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unsigned char *data;
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int len;
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int done = 0;
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while (done < budget) {
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data = mt76_queue_dequeue(dev, q, false, &len, NULL);
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if (!data)
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break;
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skb = build_skb(data, q->buf_size);
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if (!skb) {
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skb_free_frag(data);
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continue;
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}
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if (skb->tail + len > skb->end) {
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dev_kfree_skb(skb);
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continue;
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}
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__skb_put(skb, len);
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mt7603_process_rx_skb(dev, q, skb);
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done++;
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}
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mt76_queue_rx_fill(dev, q, true);
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return done;
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}
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static int
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mt7603_init_rx_queue(struct mt7603_dev *dev, struct mt76_queue *q,
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int idx, int n_desc, int bufsize)
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{
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int ret;
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q->regs = dev->mt76.regs + MT_RX_RING_BASE + idx * MT_RING_SIZE;
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q->ndesc = n_desc;
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q->buf_size = bufsize;
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ret = mt76_queue_alloc(dev, q);
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if (ret)
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return ret;
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mt7603_irq_enable(dev, MT_INT_RX_DONE(idx));
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return 0;
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}
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static void
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mt7603_tx_tasklet(unsigned long data)
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{
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struct mt7603_dev *dev = (struct mt7603_dev *) data;
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int i;
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for (i = ARRAY_SIZE(dev->mt76.q_tx) - 1; i >= 0; i--)
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mt7603_tx_cleanup(dev, &dev->mt76.q_tx[i], false);
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mt7603_irq_enable(dev, MT_INT_TX_DONE_ALL);
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}
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static int
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mt7603_dma_rx_poll(struct napi_struct *napi, int budget)
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{
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struct mt7603_dev *dev = container_of(napi, struct mt7603_dev, napi);
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int done;
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done = mt7603_process_rx_queue(dev, &dev->q_rx, budget);
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if (done < budget) {
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napi_complete(napi);
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mt7603_irq_enable(dev, MT_INT_RX_DONE(0));
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}
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return done;
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}
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static void
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mt7603_rx_tasklet(unsigned long data)
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{
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struct mt7603_dev *dev = (struct mt7603_dev *) data;
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mt7603_process_rx_queue(dev, &dev->mcu.q_rx, dev->mcu.q_rx.ndesc);
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mt7603_irq_enable(dev, MT_INT_RX_DONE(1));
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}
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int mt7603_dma_init(struct mt7603_dev *dev)
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{
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static const u8 wmm_queue_map[] = {
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[IEEE80211_AC_BE] = 0,
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[IEEE80211_AC_BK] = 1,
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[IEEE80211_AC_VI] = 2,
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[IEEE80211_AC_VO] = 3,
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};
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int ret;
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int i;
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mt76_dma_init(&dev->mt76);
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init_waitqueue_head(&dev->mcu.wait);
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skb_queue_head_init(&dev->mcu.res_q);
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init_dummy_netdev(&dev->napi_dev);
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netif_napi_add(&dev->napi_dev, &dev->napi, mt7603_dma_rx_poll, 64);
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napi_enable(&dev->napi);
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tasklet_init(&dev->tx_tasklet, mt7603_tx_tasklet, (unsigned long) dev);
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tasklet_init(&dev->rx_tasklet, mt7603_rx_tasklet, (unsigned long) dev);
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mt76_clear(dev, MT_WPDMA_GLO_CFG,
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MT_WPDMA_GLO_CFG_TX_DMA_EN |
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MT_WPDMA_GLO_CFG_RX_DMA_EN |
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MT_WPDMA_GLO_CFG_DMA_BURST_SIZE |
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MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE);
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mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
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for (i = 0; i < ARRAY_SIZE(wmm_queue_map); i++) {
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ret = mt7603_init_tx_queue(dev, &dev->mt76.q_tx[i], wmm_queue_map[i],
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MT_TX_RING_SIZE);
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if (ret)
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return ret;
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}
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ret = mt7603_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_PSD],
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MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE);
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if (ret)
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return ret;
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ret = mt7603_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_MCU],
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MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
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if (ret)
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return ret;
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ret = mt7603_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_BEACON],
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MT_TX_HW_QUEUE_BCN, MT_MCU_RING_SIZE);
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if (ret)
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return ret;
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ret = mt7603_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_CAB],
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MT_TX_HW_QUEUE_BMC, MT_MCU_RING_SIZE);
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if (ret)
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return ret;
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ret = mt7603_init_rx_queue(dev, &dev->mcu.q_rx, 1, MT_MCU_RING_SIZE,
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MT_RX_BUF_SIZE);
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if (ret)
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return ret;
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ret = mt7603_init_rx_queue(dev, &dev->q_rx, 0,
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MT_RX_RING_SIZE, MT_RX_BUF_SIZE);
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if (ret)
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return ret;
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mt76_queue_rx_fill(dev, &dev->q_rx, false);
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mt76_queue_rx_fill(dev, &dev->mcu.q_rx, false);
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mt76_wr(dev, MT_DELAY_INT_CFG, 0);
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return 0;
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}
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void mt7603_dma_cleanup(struct mt7603_dev *dev)
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{
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int i;
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mt76_clear(dev, MT_WPDMA_GLO_CFG,
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MT_WPDMA_GLO_CFG_TX_DMA_EN |
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MT_WPDMA_GLO_CFG_RX_DMA_EN |
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MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE);
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tasklet_kill(&dev->tx_tasklet);
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tasklet_kill(&dev->rx_tasklet);
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for (i = 0; i < ARRAY_SIZE(dev->mt76.q_tx); i++)
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mt7603_tx_cleanup(dev, &dev->mt76.q_tx[i], true);
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mt76_queue_rx_cleanup(dev, &dev->q_rx);
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mt76_queue_rx_cleanup(dev, &dev->mcu.q_rx);
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}
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