mirror of
https://github.com/outbackdingo/mt76.git
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The SPR parameter set comprises OBSS PD threshold for SRG and non SRG and Bitmap of BSS color and partial BSSID. This adds support to configure fields of SPR element to firmware. User can disable firmware SR algorithms by turning sr_scene_detect off. Signed-off-by: Ryder Lee <[email protected]> Signed-off-by: Felix Fietkau <[email protected]>
670 lines
10 KiB
C
670 lines
10 KiB
C
/* SPDX-License-Identifier: ISC */
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/*
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* Copyright (C) 2022 MediaTek Inc.
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*/
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#ifndef __MT7996_MCU_H
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#define __MT7996_MCU_H
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#include "../mt76_connac_mcu.h"
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struct mt7996_mcu_rxd {
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__le32 rxd[8];
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__le16 len;
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__le16 pkt_type_id;
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u8 eid;
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u8 seq;
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u8 option;
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u8 __rsv;
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u8 ext_eid;
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u8 __rsv1[2];
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u8 s2d_index;
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};
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struct mt7996_mcu_uni_event {
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u8 cid;
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u8 __rsv[3];
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__le32 status; /* 0: success, others: fail */
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} __packed;
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struct mt7996_mcu_csa_notify {
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struct mt7996_mcu_rxd rxd;
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u8 omac_idx;
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u8 csa_count;
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u8 band_idx;
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u8 rsv;
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} __packed;
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struct mt7996_mcu_rdd_report {
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struct mt7996_mcu_rxd rxd;
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u8 __rsv1[4];
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__le16 tag;
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__le16 len;
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u8 band_idx;
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u8 long_detected;
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u8 constant_prf_detected;
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u8 staggered_prf_detected;
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u8 radar_type_idx;
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u8 periodic_pulse_num;
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u8 long_pulse_num;
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u8 hw_pulse_num;
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u8 out_lpn;
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u8 out_spn;
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u8 out_crpn;
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u8 out_crpw;
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u8 out_crbn;
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u8 out_stgpn;
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u8 out_stgpw;
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u8 __rsv2;
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__le32 out_pri_const;
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__le32 out_pri_stg[3];
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__le32 out_pri_stg_dmin;
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struct {
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__le32 start;
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__le16 pulse_width;
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__le16 pulse_power;
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u8 mdrdy_flag;
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u8 rsv[3];
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} long_pulse[32];
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struct {
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__le32 start;
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__le16 pulse_width;
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__le16 pulse_power;
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u8 mdrdy_flag;
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u8 rsv[3];
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} periodic_pulse[32];
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struct {
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__le32 start;
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__le16 pulse_width;
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__le16 pulse_power;
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u8 sc_pass;
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u8 sw_reset;
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u8 mdrdy_flag;
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u8 tx_active;
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} hw_pulse[32];
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} __packed;
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struct mt7996_mcu_background_chain_ctrl {
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u8 _rsv[4];
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__le16 tag;
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__le16 len;
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u8 chan; /* primary channel */
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u8 central_chan; /* central channel */
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u8 bw;
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u8 tx_stream;
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u8 rx_stream;
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u8 monitor_chan; /* monitor channel */
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u8 monitor_central_chan;/* monitor central channel */
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u8 monitor_bw;
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u8 monitor_tx_stream;
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u8 monitor_rx_stream;
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u8 scan_mode; /* 0: ScanStop
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* 1: ScanStart
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* 2: ScanRunning
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*/
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u8 band_idx; /* DBDC */
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u8 monitor_scan_type;
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u8 band; /* 0: 2.4GHz, 1: 5GHz */
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u8 rsv[2];
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} __packed;
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struct mt7996_mcu_eeprom {
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u8 _rsv[4];
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__le16 tag;
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__le16 len;
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u8 buffer_mode;
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u8 format;
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__le16 buf_len;
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} __packed;
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struct mt7996_mcu_phy_rx_info {
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u8 category;
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u8 rate;
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u8 mode;
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u8 nsts;
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u8 gi;
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u8 coding;
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u8 stbc;
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u8 bw;
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};
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struct mt7996_mcu_mib {
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__le16 tag;
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__le16 len;
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__le32 offs;
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__le64 data;
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} __packed;
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enum mt7996_chan_mib_offs {
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UNI_MIB_OBSS_AIRTIME = 26,
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UNI_MIB_NON_WIFI_TIME = 27,
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UNI_MIB_TX_TIME = 28,
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UNI_MIB_RX_TIME = 29
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};
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struct edca {
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__le16 tag;
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__le16 len;
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u8 queue;
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u8 set;
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u8 cw_min;
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u8 cw_max;
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__le16 txop;
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u8 aifs;
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u8 __rsv;
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};
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#define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10))
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#define MCU_PKT_ID 0xa0
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enum {
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MCU_FW_LOG_WM,
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MCU_FW_LOG_WA,
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MCU_FW_LOG_TO_HOST,
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MCU_FW_LOG_RELAY = 16
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};
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enum {
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MCU_TWT_AGRT_ADD,
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MCU_TWT_AGRT_MODIFY,
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MCU_TWT_AGRT_DELETE,
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MCU_TWT_AGRT_TEARDOWN,
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MCU_TWT_AGRT_GET_TSF,
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};
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enum {
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MCU_WA_PARAM_CMD_QUERY,
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MCU_WA_PARAM_CMD_SET,
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MCU_WA_PARAM_CMD_CAPABILITY,
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MCU_WA_PARAM_CMD_DEBUG,
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};
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enum {
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MCU_WA_PARAM_PDMA_RX = 0x04,
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MCU_WA_PARAM_CPU_UTIL = 0x0b,
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MCU_WA_PARAM_RED = 0x0e,
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MCU_WA_PARAM_HW_PATH_HIF_VER = 0x2f,
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};
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enum mcu_mmps_mode {
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MCU_MMPS_STATIC,
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MCU_MMPS_DYNAMIC,
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MCU_MMPS_RSV,
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MCU_MMPS_DISABLE,
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};
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struct bss_rate_tlv {
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__le16 tag;
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__le16 len;
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u8 __rsv1[4];
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__le16 bc_trans;
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__le16 mc_trans;
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u8 short_preamble;
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u8 bc_fixed_rate;
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u8 mc_fixed_rate;
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u8 __rsv2[1];
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} __packed;
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struct bss_ra_tlv {
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__le16 tag;
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__le16 len;
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u8 short_preamble;
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u8 force_sgi;
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u8 force_gf;
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u8 ht_mode;
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u8 se_off;
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u8 antenna_idx;
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__le16 max_phyrate;
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u8 force_tx_streams;
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u8 __rsv[3];
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} __packed;
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struct bss_rlm_tlv {
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__le16 tag;
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__le16 len;
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u8 control_channel;
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u8 center_chan;
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u8 center_chan2;
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u8 bw;
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u8 tx_streams;
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u8 rx_streams;
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u8 ht_op_info;
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u8 sco;
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u8 band;
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u8 __rsv[3];
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} __packed;
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struct bss_color_tlv {
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__le16 tag;
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__le16 len;
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u8 enable;
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u8 color;
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u8 rsv[2];
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} __packed;
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struct bss_inband_discovery_tlv {
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__le16 tag;
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__le16 len;
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u8 tx_type;
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u8 tx_mode;
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u8 tx_interval;
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u8 enable;
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__le16 wcid;
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__le16 prob_rsp_len;
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#define MAX_INBAND_FRAME_SIZE 512
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u8 pkt[MAX_INBAND_FRAME_SIZE];
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} __packed;
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struct bss_bcn_content_tlv {
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__le16 tag;
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__le16 len;
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__le16 tim_ie_pos;
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__le16 csa_ie_pos;
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__le16 bcc_ie_pos;
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u8 enable;
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u8 type;
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__le16 pkt_len;
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#define MAX_BEACON_SIZE 512
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u8 pkt[MAX_BEACON_SIZE];
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} __packed;
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struct bss_bcn_cntdwn_tlv {
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__le16 tag;
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__le16 len;
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u8 cnt;
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u8 rsv[3];
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} __packed;
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struct bss_bcn_mbss_tlv {
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__le16 tag;
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__le16 len;
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__le32 bitmap;
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#define MAX_BEACON_NUM 32
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__le16 offset[MAX_BEACON_NUM];
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} __packed __aligned(4);
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struct bss_txcmd_tlv {
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__le16 tag;
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__le16 len;
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u8 txcmd_mode;
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u8 __rsv[3];
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} __packed;
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struct bss_sec_tlv {
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__le16 tag;
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__le16 len;
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u8 __rsv1[2];
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u8 cipher;
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u8 __rsv2[1];
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} __packed;
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struct bss_power_save {
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__le16 tag;
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__le16 len;
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u8 profile;
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u8 _rsv[3];
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} __packed;
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struct bss_mld_tlv {
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__le16 tag;
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__le16 len;
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u8 group_mld_id;
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u8 own_mld_id;
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u8 mac_addr[ETH_ALEN];
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u8 remap_idx;
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u8 __rsv[3];
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} __packed;
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struct sta_rec_ba_uni {
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__le16 tag;
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__le16 len;
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u8 tid;
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u8 ba_type;
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u8 amsdu;
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u8 ba_en;
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__le16 ssn;
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__le16 winsize;
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u8 ba_rdd_rro;
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u8 __rsv[3];
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} __packed;
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struct sec_key_uni {
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__le16 wlan_idx;
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u8 mgmt_prot;
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u8 cipher_id;
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u8 cipher_len;
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u8 key_id;
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u8 key_len;
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u8 need_resp;
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u8 key[32];
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} __packed;
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struct sta_rec_sec_uni {
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__le16 tag;
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__le16 len;
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u8 add;
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u8 n_cipher;
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u8 rsv[2];
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struct sec_key_uni key[2];
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} __packed;
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struct sta_rec_hdrt {
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__le16 tag;
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__le16 len;
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u8 hdrt_mode;
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u8 rsv[3];
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} __packed;
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struct sta_rec_hdr_trans {
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__le16 tag;
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__le16 len;
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u8 from_ds;
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u8 to_ds;
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u8 dis_rx_hdr_tran;
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u8 rsv;
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} __packed;
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struct hdr_trans_en {
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__le16 tag;
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__le16 len;
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u8 enable;
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u8 check_bssid;
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u8 mode;
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u8 __rsv;
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} __packed;
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struct hdr_trans_vlan {
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__le16 tag;
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__le16 len;
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u8 insert_vlan;
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u8 remove_vlan;
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u8 tid;
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u8 __rsv;
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} __packed;
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struct hdr_trans_blacklist {
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__le16 tag;
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__le16 len;
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u8 idx;
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u8 enable;
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__le16 type;
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} __packed;
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struct uni_header {
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u8 __rsv[4];
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} __packed;
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struct vow_rx_airtime {
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__le16 tag;
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__le16 len;
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u8 enable;
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u8 band;
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u8 __rsv[2];
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} __packed;
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struct bf_sounding_on {
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__le16 tag;
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__le16 len;
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u8 snd_mode;
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u8 sta_num;
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u8 __rsv[2];
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__le16 wlan_id[4];
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__le32 snd_period;
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} __packed;
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struct bf_hw_en_status_update {
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__le16 tag;
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__le16 len;
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bool ebf;
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bool ibf;
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u8 __rsv[2];
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} __packed;
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struct bf_mod_en_ctrl {
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__le16 tag;
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__le16 len;
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u8 bf_num;
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u8 bf_bitmap;
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u8 bf_sel[8];
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u8 __rsv[2];
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} __packed;
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union bf_tag_tlv {
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struct bf_sounding_on bf_snd;
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struct bf_hw_en_status_update bf_hw_en;
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struct bf_mod_en_ctrl bf_mod_en;
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};
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struct ra_rate {
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__le16 wlan_idx;
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u8 mode;
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u8 stbc;
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__le16 gi;
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u8 bw;
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u8 ldpc;
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u8 mcs;
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u8 nss;
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__le16 ltf;
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u8 spe;
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u8 preamble;
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u8 __rsv[2];
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} __packed;
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struct ra_fixed_rate {
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__le16 tag;
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__le16 len;
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__le16 version;
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struct ra_rate rate;
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} __packed;
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enum {
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UNI_RA_FIXED_RATE = 0xf,
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};
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#define MT7996_HDR_TRANS_MAX_SIZE (sizeof(struct hdr_trans_en) + \
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sizeof(struct hdr_trans_vlan) + \
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sizeof(struct hdr_trans_blacklist))
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enum {
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UNI_HDR_TRANS_EN,
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UNI_HDR_TRANS_VLAN,
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UNI_HDR_TRANS_BLACKLIST,
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};
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enum {
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RATE_PARAM_FIXED = 3,
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RATE_PARAM_MMPS_UPDATE = 5,
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RATE_PARAM_FIXED_HE_LTF = 7,
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RATE_PARAM_FIXED_MCS,
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RATE_PARAM_FIXED_GI = 11,
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RATE_PARAM_AUTO = 20,
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};
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enum {
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BF_SOUNDING_ON = 1,
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BF_HW_EN_UPDATE = 17,
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BF_MOD_EN_CTRL = 20,
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};
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enum {
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CMD_BAND_NONE,
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CMD_BAND_24G,
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CMD_BAND_5G,
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CMD_BAND_6G,
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};
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struct bss_req_hdr {
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u8 bss_idx;
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u8 __rsv[3];
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} __packed;
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enum {
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UNI_CHANNEL_SWITCH,
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UNI_CHANNEL_RX_PATH,
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};
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#define MT7996_BSS_UPDATE_MAX_SIZE (sizeof(struct bss_req_hdr) + \
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sizeof(struct mt76_connac_bss_basic_tlv) + \
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sizeof(struct bss_rlm_tlv) + \
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sizeof(struct bss_ra_tlv) + \
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sizeof(struct bss_info_uni_he) + \
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sizeof(struct bss_rate_tlv) + \
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sizeof(struct bss_txcmd_tlv) + \
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sizeof(struct bss_power_save) + \
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sizeof(struct bss_sec_tlv) + \
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sizeof(struct bss_mld_tlv))
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#define MT7996_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \
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sizeof(struct sta_rec_basic) + \
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sizeof(struct sta_rec_bf) + \
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sizeof(struct sta_rec_ht) + \
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sizeof(struct sta_rec_he_v2) + \
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sizeof(struct sta_rec_ba_uni) + \
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sizeof(struct sta_rec_vht) + \
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sizeof(struct sta_rec_uapsd) + \
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sizeof(struct sta_rec_amsdu) + \
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sizeof(struct sta_rec_bfee) + \
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sizeof(struct sta_rec_phy) + \
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sizeof(struct sta_rec_ra) + \
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sizeof(struct sta_rec_sec) + \
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sizeof(struct sta_rec_ra_fixed) + \
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sizeof(struct sta_rec_he_6g_capa) + \
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sizeof(struct sta_rec_hdrt) + \
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sizeof(struct sta_rec_hdr_trans) + \
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sizeof(struct tlv))
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#define MT7996_BEACON_UPDATE_SIZE (sizeof(struct bss_req_hdr) + \
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sizeof(struct bss_bcn_content_tlv) + \
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sizeof(struct bss_bcn_cntdwn_tlv) + \
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sizeof(struct bss_bcn_mbss_tlv))
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#define MT7996_INBAND_FRAME_SIZE (sizeof(struct bss_req_hdr) + \
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sizeof(struct bss_inband_discovery_tlv))
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enum {
|
|
UNI_BAND_CONFIG_RADIO_ENABLE,
|
|
UNI_BAND_CONFIG_RTS_THRESHOLD = 0x08,
|
|
};
|
|
|
|
enum {
|
|
UNI_WSYS_CONFIG_FW_LOG_CTRL,
|
|
UNI_WSYS_CONFIG_FW_DBG_CTRL,
|
|
};
|
|
|
|
enum {
|
|
UNI_RDD_CTRL_PARM,
|
|
UNI_RDD_CTRL_SET_TH = 0x3,
|
|
};
|
|
|
|
enum {
|
|
UNI_EFUSE_ACCESS = 1,
|
|
UNI_EFUSE_BUFFER_MODE,
|
|
UNI_EFUSE_FREE_BLOCK,
|
|
UNI_EFUSE_BUFFER_RD,
|
|
};
|
|
|
|
enum {
|
|
UNI_VOW_DRR_CTRL,
|
|
UNI_VOW_RX_AT_AIRTIME_EN = 0x0b,
|
|
UNI_VOW_RX_AT_AIRTIME_CLR_EN = 0x0e,
|
|
};
|
|
|
|
enum {
|
|
UNI_CMD_MIB_DATA,
|
|
};
|
|
|
|
enum {
|
|
UNI_POWER_OFF,
|
|
};
|
|
|
|
enum {
|
|
UNI_CMD_TWT_ARGT_UPDATE = 0x0,
|
|
UNI_CMD_TWT_MGMT_OFFLOAD,
|
|
};
|
|
|
|
enum {
|
|
UNI_RRO_DEL_ENTRY = 0x1,
|
|
UNI_RRO_SET_PLATFORM_TYPE,
|
|
UNI_RRO_GET_BA_SESSION_TABLE,
|
|
UNI_RRO_SET_BYPASS_MODE,
|
|
UNI_RRO_SET_TXFREE_PATH,
|
|
};
|
|
|
|
enum{
|
|
UNI_CMD_SR_ENABLE = 0x1,
|
|
UNI_CMD_SR_ENABLE_SD,
|
|
UNI_CMD_SR_ENABLE_MODE,
|
|
UNI_CMD_SR_ENABLE_DPD = 0x12,
|
|
UNI_CMD_SR_ENABLE_TX,
|
|
UNI_CMD_SR_SET_SRG_BITMAP = 0x80,
|
|
UNI_CMD_SR_SET_PARAM = 0xc1,
|
|
UNI_CMD_SR_SET_SIGA = 0xd0,
|
|
};
|
|
|
|
enum {
|
|
UNI_CMD_ACCESS_REG_BASIC = 0x0,
|
|
UNI_CMD_ACCESS_RF_REG_BASIC,
|
|
};
|
|
|
|
enum {
|
|
UNI_CMD_SER_QUERY = 0x0,
|
|
UNI_CMD_SER_SET = 0x2,
|
|
UNI_CMD_SER_TRIGGER = 0x3,
|
|
};
|
|
|
|
enum {
|
|
SER_QUERY,
|
|
/* recovery */
|
|
SER_SET_RECOVER_L1,
|
|
SER_SET_RECOVER_L2,
|
|
SER_SET_RECOVER_L3_RX_ABORT,
|
|
SER_SET_RECOVER_L3_TX_ABORT,
|
|
SER_SET_RECOVER_L3_TX_DISABLE,
|
|
SER_SET_RECOVER_L3_BF,
|
|
/* action */
|
|
SER_ENABLE = 2,
|
|
SER_RECOVER
|
|
};
|
|
|
|
enum {
|
|
MT7996_SEC_MODE_PLAIN,
|
|
MT7996_SEC_MODE_AES,
|
|
MT7996_SEC_MODE_SCRAMBLE,
|
|
MT7996_SEC_MODE_MAX,
|
|
};
|
|
|
|
#define MT7996_PATCH_SEC GENMASK(31, 24)
|
|
#define MT7996_PATCH_SCRAMBLE_KEY GENMASK(15, 8)
|
|
#define MT7996_PATCH_AES_KEY GENMASK(7, 0)
|
|
|
|
#define MT7996_SEC_ENCRYPT BIT(0)
|
|
#define MT7996_SEC_KEY_IDX GENMASK(2, 1)
|
|
#define MT7996_SEC_IV BIT(3)
|
|
|
|
#endif
|