mirror of
https://github.com/outbackdingo/mt76.git
synced 2026-10-24 13:26:48 +00:00
Felix Fietkau
33f29d2345
MediaTek has asked to switch from the ISC license to BSD-3-Clause-Clear, in order to improve clarity and the legal integrity of the code. The BSD-3-Clause license includes the "no endorsement" clause, which is important for protecting the reputation of the original authors and contributors by preventing unauthorized use of their names for endorsement purposes. This clause is absent in the BSD-2-Clause license, which is more permissive but lacks this specific protection. This change also cleans up the license of some Kconfig/Makefile files, which were accidentally marked as GPL. The GPL 2.0 remains in use on mt76x0, as well as two source files in mt7615 for which the license situation still needs to be clarified. Signed-off-by: Felix Fietkau <[email protected]>
244 lines
4.5 KiB
C
244 lines
4.5 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
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/* Copyright (C) 2019 MediaTek Inc. */
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#ifndef __MT7615_MCU_H
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#define __MT7615_MCU_H
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#include "../mt76_connac_mcu.h"
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struct mt7615_mcu_txd {
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__le32 txd[8];
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__le16 len;
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__le16 pq_id;
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u8 cid;
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u8 pkt_type;
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u8 set_query; /* FW don't care */
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u8 seq;
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u8 uc_d2b0_rev;
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u8 ext_cid;
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u8 s2d_index;
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u8 ext_cid_ack;
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u32 reserved[5];
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} __packed __aligned(4);
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/**
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* struct mt7615_uni_txd - mcu command descriptor for firmware v3
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* @txd: hardware descriptor
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* @len: total length not including txd
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* @cid: command identifier
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* @pkt_type: must be 0xa0 (cmd packet by long format)
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* @frag_n: fragment number
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* @seq: sequence number
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* @checksum: 0 mean there is no checksum
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* @s2d_index: index for command source and destination
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* Definition | value | note
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* CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM
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* CMD_S2D_IDX_C2N | 0x01 | command from WA to WM
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* CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA
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* CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM
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*
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* @option: command option
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* BIT[0]: UNI_CMD_OPT_BIT_ACK
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* set to 1 to request a fw reply
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* if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY
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* is set, mcu firmware will send response event EID = 0x01
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* (UNI_EVENT_ID_CMD_RESULT) to the host.
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* BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD
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* 0: original command
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* 1: unified command
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* BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY
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* 0: QUERY command
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* 1: SET command
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*/
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struct mt7615_uni_txd {
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__le32 txd[8];
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/* DW1 */
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__le16 len;
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__le16 cid;
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/* DW2 */
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u8 reserved;
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u8 pkt_type;
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u8 frag_n;
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u8 seq;
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/* DW3 */
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__le16 checksum;
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u8 s2d_index;
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u8 option;
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/* DW4 */
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u8 reserved2[4];
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} __packed __aligned(4);
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enum {
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MT_SKU_CCK_1_2 = 0,
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MT_SKU_CCK_55_11,
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MT_SKU_OFDM_6_9,
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MT_SKU_OFDM_12_18,
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MT_SKU_OFDM_24_36,
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MT_SKU_OFDM_48,
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MT_SKU_OFDM_54,
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MT_SKU_HT20_0_8,
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MT_SKU_HT20_32,
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MT_SKU_HT20_1_2_9_10,
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MT_SKU_HT20_3_4_11_12,
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MT_SKU_HT20_5_13,
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MT_SKU_HT20_6_14,
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MT_SKU_HT20_7_15,
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MT_SKU_HT40_0_8,
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MT_SKU_HT40_32,
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MT_SKU_HT40_1_2_9_10,
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MT_SKU_HT40_3_4_11_12,
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MT_SKU_HT40_5_13,
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MT_SKU_HT40_6_14,
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MT_SKU_HT40_7_15,
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MT_SKU_VHT20_0,
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MT_SKU_VHT20_1_2,
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MT_SKU_VHT20_3_4,
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MT_SKU_VHT20_5_6,
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MT_SKU_VHT20_7,
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MT_SKU_VHT20_8,
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MT_SKU_VHT20_9,
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MT_SKU_VHT40_0,
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MT_SKU_VHT40_1_2,
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MT_SKU_VHT40_3_4,
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MT_SKU_VHT40_5_6,
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MT_SKU_VHT40_7,
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MT_SKU_VHT40_8,
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MT_SKU_VHT40_9,
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MT_SKU_VHT80_0,
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MT_SKU_VHT80_1_2,
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MT_SKU_VHT80_3_4,
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MT_SKU_VHT80_5_6,
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MT_SKU_VHT80_7,
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MT_SKU_VHT80_8,
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MT_SKU_VHT80_9,
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MT_SKU_VHT160_0,
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MT_SKU_VHT160_1_2,
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MT_SKU_VHT160_3_4,
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MT_SKU_VHT160_5_6,
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MT_SKU_VHT160_7,
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MT_SKU_VHT160_8,
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MT_SKU_VHT160_9,
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MT_SKU_1SS_DELTA,
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MT_SKU_2SS_DELTA,
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MT_SKU_3SS_DELTA,
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MT_SKU_4SS_DELTA,
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};
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struct mt7615_mcu_rxd {
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__le32 rxd[4];
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__le16 len;
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__le16 pkt_type_id;
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u8 eid;
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u8 seq;
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__le16 __rsv;
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u8 ext_eid;
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u8 __rsv1[2];
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u8 s2d_index;
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};
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struct mt7615_mcu_csa_notify {
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struct mt7615_mcu_rxd rxd;
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u8 omac_idx;
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u8 csa_count;
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u8 rsv[2];
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} __packed;
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struct mt7615_mcu_rdd_report {
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struct mt7615_mcu_rxd rxd;
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u8 band_idx;
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u8 long_detected;
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u8 constant_prf_detected;
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u8 staggered_prf_detected;
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u8 radar_type_idx;
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u8 periodic_pulse_num;
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u8 long_pulse_num;
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u8 hw_pulse_num;
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u8 out_lpn;
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u8 out_spn;
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u8 out_crpn;
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u8 out_crpw;
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u8 out_crbn;
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u8 out_stgpn;
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u8 out_stgpw;
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u8 _rsv[2];
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__le32 out_pri_const;
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__le32 out_pri_stg[3];
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struct {
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__le32 start;
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__le16 pulse_width;
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__le16 pulse_power;
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} long_pulse[32];
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struct {
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__le32 start;
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__le16 pulse_width;
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__le16 pulse_power;
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} periodic_pulse[32];
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struct {
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__le32 start;
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__le16 pulse_width;
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__le16 pulse_power;
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u8 sc_pass;
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u8 sw_reset;
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} hw_pulse[32];
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};
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enum {
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MCU_ATE_SET_FREQ_OFFSET = 0xa,
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MCU_ATE_SET_TX_POWER_CONTROL = 0x15,
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};
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struct mt7615_roc_tlv {
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u8 bss_idx;
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u8 token;
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u8 active;
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u8 primary_chan;
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u8 sco;
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u8 band;
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u8 width; /* To support 80/160MHz bandwidth */
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u8 freq_seg1; /* To support 80/160MHz bandwidth */
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u8 freq_seg2; /* To support 80/160MHz bandwidth */
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u8 req_type;
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u8 dbdc_band;
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u8 rsv0;
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__le32 max_interval; /* ms */
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u8 rsv1[8];
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} __packed;
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enum {
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FW_STATE_PWR_ON = 1,
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FW_STATE_N9_RDY = 2,
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};
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enum {
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DBDC_TYPE_WMM,
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DBDC_TYPE_MGMT,
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DBDC_TYPE_BSS,
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DBDC_TYPE_MBSS,
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DBDC_TYPE_REPEATER,
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DBDC_TYPE_MU,
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DBDC_TYPE_BF,
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DBDC_TYPE_PTA,
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__DBDC_TYPE_MAX,
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};
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#endif
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