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dma: fix tx ring flush
Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
@@ -152,11 +152,13 @@ mt76_dma_tx_cleanup(struct mt76_dev *dev, enum mt76_txq_id qid, bool flush)
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q->tail = (q->tail + 1) % q->ndesc;
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q->queued--;
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if (q->tail == last)
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if (!flush && q->tail == last)
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last = ioread32(&q->regs->dma_idx);
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}
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if (!flush)
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mt76_txq_schedule(dev, q);
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else
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iowrite32(q->tail, &q->regs->dma_idx);
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spin_unlock_bh(&q->lock);
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}
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