diff --git a/mt7603_core.c b/mt7603_core.c
index c6b0fbd1..6c0bb394 100644
--- a/mt7603_core.c
+++ b/mt7603_core.c
@@ -38,7 +38,6 @@ irqreturn_t mt7603_irq_handler(int irq, void *dev_instance)
 	intr &= dev->irqmask;
 	printk("got irq: %08x\n", intr);
 
-#if 0
 	if (intr & MT_INT_TX_DONE_ALL) {
 		mt7603_irq_disable(dev, MT_INT_TX_DONE_ALL);
 		tasklet_schedule(&dev->tx_tasklet);
@@ -54,17 +53,13 @@ irqreturn_t mt7603_irq_handler(int irq, void *dev_instance)
 		tasklet_schedule(&dev->rx_tasklet);
 	}
 
+#if 0
 	if (intr & MT_INT_PRE_TBTT)
 		tasklet_schedule(&dev->pre_tbtt_tasklet);
 
 	/* send buffered multicast frames now */
 	if (intr & MT_INT_TBTT)
 		mt76_queue_kick(dev, &dev->q_tx[MT_TXQ_PSD]);
-
-	if (intr & MT_INT_TX_STAT) {
-		mt7603_mac_poll_tx_status(dev, true);
-		tasklet_schedule(&dev->tx_tasklet);
-	}
 #endif
 
 	return IRQ_HANDLED;
diff --git a/mt7603_init.c b/mt7603_init.c
index 5bcb194b..da4c677e 100644
--- a/mt7603_init.c
+++ b/mt7603_init.c
@@ -29,10 +29,41 @@ struct mt7603_dev *mt7603_alloc_device(struct device *pdev)
 	return dev;
 }
 
+int mt7603_mac_reset(struct mt7603_dev *dev)
+{
+	u32 val;
+
+	val = mt76_rr(dev, MT_WPDMA_GLO_CFG);
+
+	val &= ~(MT_WPDMA_GLO_CFG_TX_DMA_EN |
+		 MT_WPDMA_GLO_CFG_TX_DMA_BUSY |
+		 MT_WPDMA_GLO_CFG_RX_DMA_EN |
+		 MT_WPDMA_GLO_CFG_RX_DMA_BUSY |
+		 MT_WPDMA_GLO_CFG_DMA_BURST_SIZE);
+	val |= MT76_SET(MT_WPDMA_GLO_CFG_DMA_BURST_SIZE, 3);
+
+	mt76_wr(dev, MT_WPDMA_GLO_CFG, val);
+	return 0;
+}
+
+int mt7603_mac_start(struct mt7603_dev *dev)
+{
+	mt76_set(dev, MT_WPDMA_GLO_CFG,
+		 MT_WPDMA_GLO_CFG_TX_DMA_EN |
+		 MT_WPDMA_GLO_CFG_RX_DMA_EN);
+
+	mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE);
+	return 0;
+}
+
 int mt7603_init_hardware(struct mt7603_dev *dev)
 {
 	int ret;
 
+	ret = mt7603_mac_reset(dev);
+	if (ret)
+		return ret;
+
 	ret = mt7603_dma_init(dev);
 	if (ret)
 		return ret;
@@ -40,6 +71,10 @@ int mt7603_init_hardware(struct mt7603_dev *dev)
 	set_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
 	mt7603_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL);
 
+	ret = mt7603_mac_start(dev);
+	if (ret)
+		return ret;
+
 	ret = mt7603_mcu_init(dev);
 	if (ret)
 		return ret;
diff --git a/mt7603_regs.h b/mt7603_regs.h
index 7d7af2d2..69f10d02 100644
--- a/mt7603_regs.h
+++ b/mt7603_regs.h
@@ -35,16 +35,28 @@
 #define MT_INT_SOURCE_CSR		MT_HIF(0x200)
 #define MT_INT_MASK_CSR			MT_HIF(0x204)
 
-#define MT_INT_RX_DONE(_n)      BIT(_n)
-#define MT_INT_RX_DONE_ALL      GENMASK(1, 0)
-#define MT_INT_TX_DONE_ALL      GENMASK(19, 4)
-#define MT_INT_TX_DONE(_n)      BIT(_n + 4)
+#define MT_INT_RX_DONE(_n)		BIT(_n)
+#define MT_INT_RX_DONE_ALL		GENMASK(1, 0)
+#define MT_INT_TX_DONE_ALL		GENMASK(19, 4)
+#define MT_INT_TX_DONE(_n)		BIT(_n + 4)
 
-#define MT_INT_RX_COHERENT      BIT(20)
-#define MT_INT_TX_COHERENT      BIT(21)
-#define MT_INT_PRE_TBTT         BIT(27)
+#define MT_INT_RX_COHERENT		BIT(20)
+#define MT_INT_TX_COHERENT		BIT(21)
+#define MT_INT_PRE_TBTT			BIT(27)
 
-#define MT_INT_MCU_CMD          BIT(30)
+#define MT_INT_MCU_CMD			BIT(30)
+
+#define MT_WPDMA_GLO_CFG		MT_HIF(0x208)
+#define MT_WPDMA_GLO_CFG_TX_DMA_EN	BIT(0)
+#define MT_WPDMA_GLO_CFG_TX_DMA_BUSY	BIT(1)
+#define MT_WPDMA_GLO_CFG_RX_DMA_EN	BIT(2)
+#define MT_WPDMA_GLO_CFG_RX_DMA_BUSY	BIT(3)
+#define MT_WPDMA_GLO_CFG_DMA_BURST_SIZE	GENMASK(5, 4)
+#define MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE	BIT(6)
+#define MT_WPDMA_GLO_CFG_BIG_ENDIAN	BIT(7)
+#define MT_WPDMA_GLO_CFG_HDR_SEG_LEN	GENMASK(15, 8)
+#define MT_WPDMA_GLO_CFG_CLK_GATE_DIS	BIT(30)
+#define MT_WPDMA_GLO_CFG_RX_2B_OFFSET	BIT(31)
 
 #define MT_WPDMA_RST_IDX		MT_HIF(0x20c)