From ea4c2a165ac83b84fc123c46bd7d32a70df41f3d Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Fri, 1 Dec 2017 17:50:55 +0100 Subject: [PATCH] mt7603: rename MT_PSE_RESET register It is actually a dummy control register used for communicating reset state with the MCU firmware Signed-off-by: Felix Fietkau --- mt7603_mac.c | 14 +++++++------- mt7603_regs.h | 8 ++++---- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/mt7603_mac.c b/mt7603_mac.c index f63a3508..e9b9917c 100644 --- a/mt7603_mac.c +++ b/mt7603_mac.c @@ -1066,14 +1066,14 @@ static void mt7603_pse_reset(struct mt7603_dev *dev) u32 addr = mt7603_reg_map(dev, MT_CLIENT_BASE_PHYS_ADDR); /* Reset PSE */ - mt76_clear(dev, MT_PSE_RESET, MT_PSE_RESET_SW_S); - mt76_set(dev, MT_PSE_RESET, MT_PSE_RESET_SW); - if (!mt76_poll_msec(dev, MT_PSE_RESET, MT_PSE_RESET_SW_S, - MT_PSE_RESET_SW_S, 500)) { - mt76_clear(dev, MT_PSE_RESET, MT_PSE_RESET_SW); + mt76_clear(dev, MT_MCU_DEBUG_RESET, MT_MCU_DEBUG_RESET_PSE_S); + mt76_set(dev, MT_MCU_DEBUG_RESET, MT_MCU_DEBUG_RESET_PSE); + if (!mt76_poll_msec(dev, MT_MCU_DEBUG_RESET, MT_MCU_DEBUG_RESET_PSE_S, + MT_MCU_DEBUG_RESET_PSE_S, 500)) { + mt76_clear(dev, MT_MCU_DEBUG_RESET, MT_MCU_DEBUG_RESET_PSE); goto out; } - mt76_clear(dev, MT_PSE_RESET, MT_PSE_RESET_SW_S); + mt76_clear(dev, MT_MCU_DEBUG_RESET, MT_MCU_DEBUG_RESET_PSE_S); mt76_set(dev, addr + MT_CLIENT_RESET_TX, MT_CLIENT_RESET_TX_R_E_1); mt76_poll_msec(dev, addr + MT_CLIENT_RESET_TX, @@ -1090,7 +1090,7 @@ static void mt7603_pse_reset(struct mt7603_dev *dev) mt76_clear(dev, addr + MT_CLIENT_RESET_TX, MT_CLIENT_RESET_TX_R_E_1 | MT_CLIENT_RESET_TX_R_E_2); out: - mt76_clear(dev, MT_PSE_RESET, MT_PSE_RESET_QUEUES); + mt76_clear(dev, MT_MCU_DEBUG_RESET, MT_MCU_DEBUG_RESET_QUEUES); } void mt7603_mac_dma_start(struct mt7603_dev *dev) diff --git a/mt7603_regs.h b/mt7603_regs.h index 8b54154e..9b6116af 100644 --- a/mt7603_regs.h +++ b/mt7603_regs.h @@ -103,10 +103,10 @@ #define MT_PSE_BASE 0x8000 #define MT_PSE(ofs) (MT_PSE_BASE + (ofs)) -#define MT_PSE_RESET MT_PSE(0x16c) -#define MT_PSE_RESET_SW BIT(0) -#define MT_PSE_RESET_SW_S BIT(1) -#define MT_PSE_RESET_QUEUES GENMASK(6, 2) +#define MT_MCU_DEBUG_RESET MT_PSE(0x16c) +#define MT_MCU_DEBUG_RESET_PSE BIT(0) +#define MT_MCU_DEBUG_RESET_PSE_S BIT(1) +#define MT_MCU_DEBUG_RESET_QUEUES GENMASK(6, 2) #define MT_PSE_FC_P0 MT_PSE(0x120) #define MT_PSE_FC_P0_MIN_RESERVE GENMASK(11, 0)