diff --git a/mt7603.h b/mt7603.h
index 09460d24..4658d33b 100644
--- a/mt7603.h
+++ b/mt7603.h
@@ -99,6 +99,8 @@ struct mt7603_dev {
 
 	u8 rssi_offset[3];
 
+	s16 coverage_class;
+
 	struct mt7603_mcu mcu;
 	struct mt76_queue q_rx;
 
@@ -151,6 +153,7 @@ static inline void mt7603_irq_disable(struct mt7603_dev *dev, u32 mask)
 
 void mt7603_mac_start(struct mt7603_dev *dev);
 void mt7603_mac_stop(struct mt7603_dev *dev);
+void mt7603_mac_set_timing(struct mt7603_dev *dev);
 int mt7603_mac_fill_rx(struct mt7603_dev *dev, struct sk_buff *skb);
 void mt7603_mac_add_txs(struct mt7603_dev *dev, void *data);
 struct sk_buff *mt7603_mac_status_skb(struct mt7603_dev *dev,
diff --git a/mt7603_mac.c b/mt7603_mac.c
index 6787f972..6fb9342e 100644
--- a/mt7603_mac.c
+++ b/mt7603_mac.c
@@ -41,6 +41,20 @@ mt76_start_tx_ac(struct mt7603_dev *dev, u32 mask)
 	mt76_set(dev, MT_WF_ARB_TX_START_0, mt7603_ac_queue_mask0(mask));
 }
 
+void mt7603_mac_set_timing(struct mt7603_dev *dev)
+{
+	u32 cck = MT76_SET(MT_TIMEOUT_VAL_PLCP, 231) |
+		  MT76_SET(MT_TIMEOUT_VAL_CCA, 48);
+	u32 ofdm = MT76_SET(MT_TIMEOUT_VAL_PLCP, 60) |
+		   MT76_SET(MT_TIMEOUT_VAL_CCA, 24);
+	int offset = 3 * dev->coverage_class;
+	u32 reg_offset = MT76_SET(MT_TIMEOUT_VAL_PLCP, offset) |
+			 MT76_SET(MT_TIMEOUT_VAL_CCA, offset);
+
+	mt76_wr(dev, MT_TIMEOUT_CCK, cck + reg_offset);
+	mt76_wr(dev, MT_TIMEOUT_OFDM, ofdm + reg_offset);
+}
+
 static void
 mt7603_wtbl_update(struct mt7603_dev *dev, int idx, u32 mask)
 {
diff --git a/mt7603_main.c b/mt7603_main.c
index 6fe2cfc4..21fe71b5 100644
--- a/mt7603_main.c
+++ b/mt7603_main.c
@@ -369,6 +369,9 @@ mt7603_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
 static void mt7603_set_coverage_class(struct ieee80211_hw *hw,
 				    s16 coverage_class)
 {
+	struct mt7603_dev *dev = hw->priv;
+	dev->coverage_class = coverage_class;
+	mt7603_mac_set_timing(dev);
 }
 
 static void mt7603_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
diff --git a/mt7603_regs.h b/mt7603_regs.h
index bca51dba..338526bd 100644
--- a/mt7603_regs.h
+++ b/mt7603_regs.h
@@ -217,6 +217,11 @@
 #define MT_WMM_TXOP_SHIFT(_n)		((_n & 1) * 16)
 #define MT_WMM_TXOP_MASK		GENMASK(15, 0)
 
+#define MT_TIMEOUT_CCK			MT_WF_TMAC(0x090)
+#define MT_TIMEOUT_OFDM			MT_WF_TMAC(0x094)
+#define MT_TIMEOUT_VAL_PLCP		GENMASK(15, 0)
+#define MT_TIMEOUT_VAL_CCA		GENMASK(31, 16)
+
 #define MT_WF_RMAC_BASE			0x21800
 #define MT_WF_RMAC(ofs)			(MT_WF_RMAC_BASE + (ofs))