From dda684912ee6e91ed23e44e70613b7ba2e4ccc1e Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Mon, 22 May 2017 19:51:37 +0200 Subject: [PATCH] mt7603: fix tx status reporting initialization Signed-off-by: Felix Fietkau --- mt7603_init.c | 15 ++++++++++----- mt7603_regs.h | 9 +++++---- 2 files changed, 15 insertions(+), 9 deletions(-) diff --git a/mt7603_init.c b/mt7603_init.c index 52847315..2031915e 100644 --- a/mt7603_init.c +++ b/mt7603_init.c @@ -211,12 +211,17 @@ mt7603_mac_init(struct mt7603_dev *dev) /* Configure all rx packets to HIF */ mt76_wr(dev, MT_DMA_RCFR0, 0xc0000000); - /* Configure txs selection with aggregation */ + /* Configure MCU txs selection with aggregation */ + mt76_wr(dev, MT_DMA_TCFR0, + FIELD_PREP(MT_DMA_TCFR_TXS_AGGR_TIMEOUT, 1) | /* 32 us */ + MT_DMA_TCFR_TXS_AGGR_COUNT); + + /* Configure HIF txs selection with aggregation */ mt76_wr(dev, MT_DMA_TCFR1, - FIELD_PREP(MT_DMA_TCFR1_TXS_AGGR_TIMEOUT, 1) | /* 32 us */ - MT_DMA_TCFR1_TXS_AGGR_COUNT | /* Maximum count */ - MT_DMA_TCFR1_TXS_QUEUE | /* Queue 1 */ - MT_DMA_TCFR1_TXS_BIT_MAP); + FIELD_PREP(MT_DMA_TCFR_TXS_AGGR_TIMEOUT, 1) | /* 32 us */ + MT_DMA_TCFR_TXS_AGGR_COUNT | /* Maximum count */ + MT_DMA_TCFR_TXS_QUEUE | /* Queue 1 */ + MT_DMA_TCFR_TXS_BIT_MAP); mt76_wr(dev, MT_MCU_PCIE_REMAP_1, MT_PSE_WTBL_2_PHYS_ADDR); diff --git a/mt7603_regs.h b/mt7603_regs.h index a0822521..b0a5923a 100644 --- a/mt7603_regs.h +++ b/mt7603_regs.h @@ -205,11 +205,12 @@ #define MT_DMA_RCFR0 MT_WF_DMA(0x070) #define MT_DMA_VCFR0 MT_WF_DMA(0x07c) +#define MT_DMA_TCFR0 MT_WF_DMA(0x080) #define MT_DMA_TCFR1 MT_WF_DMA(0x084) -#define MT_DMA_TCFR1_TXS_AGGR_TIMEOUT GENMASK(27, 16) -#define MT_DMA_TCFR1_TXS_QUEUE BIT(14) -#define MT_DMA_TCFR1_TXS_AGGR_COUNT GENMASK(12, 8) -#define MT_DMA_TCFR1_TXS_BIT_MAP GENMASK(6, 0) +#define MT_DMA_TCFR_TXS_AGGR_TIMEOUT GENMASK(27, 16) +#define MT_DMA_TCFR_TXS_QUEUE BIT(14) +#define MT_DMA_TCFR_TXS_AGGR_COUNT GENMASK(12, 8) +#define MT_DMA_TCFR_TXS_BIT_MAP GENMASK(6, 0) #define MT_DMA_TMCFR0 MT_WF_DMA(0x088)