diff --git a/mt76.h b/mt76.h
index 154ed345..dbd7a07a 100644
--- a/mt76.h
+++ b/mt76.h
@@ -81,6 +81,7 @@ enum mt76_rxq_id {
 	MT_RXQ_MCU,
 	MT_RXQ_MCU_WA,
 	MT_RXQ_EXT,
+	MT_RXQ_EXT_WA,
 	__MT_RXQ_MAX
 };
 
diff --git a/mt7915/dma.c b/mt7915/dma.c
index 8c1f9c77..d47d8f43 100644
--- a/mt7915/dma.c
+++ b/mt7915/dma.c
@@ -286,6 +286,14 @@ int mt7915_dma_init(struct mt7915_dev *dev)
 				       rx_buf_size, MT_RX_DATA_RING_BASE);
 		if (ret)
 			return ret;
+
+		/* event from WA */
+		ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_EXT_WA],
+				       MT7915_RXQ_MCU_WA_EXT,
+				       MT7915_RX_MCU_RING_SIZE,
+				       rx_buf_size, MT_RX_EVENT_RING_BASE);
+		if (ret)
+			return ret;
 	}
 
 	ret = mt76_init_queues(dev);
diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
index ebf2a127..d1719568 100644
--- a/mt7915/mt7915.h
+++ b/mt7915/mt7915.h
@@ -57,6 +57,7 @@ enum mt7915_rxq_id {
 	MT7915_RXQ_BAND1,
 	MT7915_RXQ_MCU_WM = 0,
 	MT7915_RXQ_MCU_WA,
+	MT7915_RXQ_MCU_WA_EXT,
 };
 
 struct mt7915_sta_stats {
diff --git a/mt7915/pci.c b/mt7915/pci.c
index 3f4cda41..0bbb76e0 100644
--- a/mt7915/pci.c
+++ b/mt7915/pci.c
@@ -26,6 +26,7 @@ mt7915_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
 		[MT_RXQ_EXT] = MT_INT_RX_DONE_DATA1,
 		[MT_RXQ_MCU] = MT_INT_RX_DONE_WM,
 		[MT_RXQ_MCU_WA] = MT_INT_RX_DONE_WA,
+		[MT_RXQ_EXT_WA] = MT_INT_RX_DONE_WA_EXT,
 	};
 
 	mt7915_irq_enable(dev, rx_irq_mask[q]);
@@ -67,6 +68,9 @@ static irqreturn_t mt7915_irq_handler(int irq, void *dev_instance)
 	if (intr & MT_INT_RX_DONE_WA)
 		napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]);
 
+	if (intr & MT_INT_RX_DONE_WA_EXT)
+		napi_schedule(&dev->mt76.napi[MT_RXQ_EXT_WA]);
+
 	if (intr & MT_INT_MCU_CMD) {
 		u32 val = mt76_rr(dev, MT_MCU_CMD);
 
diff --git a/mt7915/regs.h b/mt7915/regs.h
index 3c3c613e..5eae3120 100644
--- a/mt7915/regs.h
+++ b/mt7915/regs.h
@@ -353,7 +353,8 @@
 #define MT_INT_RX_DONE_DATA1		BIT(17)
 #define MT_INT_RX_DONE_WM		BIT(0)
 #define MT_INT_RX_DONE_WA		BIT(1)
-#define MT_INT_RX_DONE_ALL		(BIT(0) | BIT(1) | GENMASK(17, 16))
+#define MT_INT_RX_DONE_WA_EXT		BIT(2)
+#define MT_INT_RX_DONE_ALL		(GENMASK(2, 0) | GENMASK(17, 16))
 #define MT_INT_TX_DONE_MCU_WA		BIT(15)
 #define MT_INT_TX_DONE_FWDL		BIT(26)
 #define MT_INT_TX_DONE_MCU_WM		BIT(27)