From c91e66098541cb96a4cc47a9598d78623269686c Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Wed, 15 Mar 2017 14:24:48 +0100 Subject: [PATCH] mt7603: set secondary beacon time offsets Signed-off-by: Felix Fietkau --- mt7603_beacon.c | 5 +++++ mt7603_init.c | 5 +++++ mt7603_regs.h | 4 ++++ 3 files changed, 14 insertions(+) diff --git a/mt7603_beacon.c b/mt7603_beacon.c index 0d8b96ae..5eb48a8c 100644 --- a/mt7603_beacon.c +++ b/mt7603_beacon.c @@ -176,4 +176,9 @@ void mt7603_beacon_set_timer(struct mt7603_dev *dev, int idx, int intval) MT_WF_ARB_BCN_START_BSSn(0) | ((dev->beacon_mask >> 1) * MT_WF_ARB_BCN_START_BSS0n(1))); mt7603_irq_enable(dev, MT_INT_MAC_IRQ3); + + if (dev->beacon_mask & ~BIT(0)) + mt76_set(dev, MT_LPON_SBTOR(0), MT_LPON_SBTOR_SUB_BSS_EN); + else + mt76_clear(dev, MT_LPON_SBTOR(0), MT_LPON_SBTOR_SUB_BSS_EN); } diff --git a/mt7603_init.c b/mt7603_init.c index f5961767..c1f6d8b0 100644 --- a/mt7603_init.c +++ b/mt7603_init.c @@ -249,6 +249,11 @@ mt7603_mac_init(struct mt7603_dev *dev) mt76_set(dev, MT_WTBL_RMVTCR, MT_WTBL_RMVTCR_RX_MV_MODE); mt76_clear(dev, MT_SEC_SCR, MT_SEC_SCR_MASK_ORDER); + + /* Set secondary beacon time offsets */ + for (i = 0; i <= 4; i++) + mt76_rmw_field(dev, MT_LPON_SBTOR(i), MT_LPON_SBTOR_TIME_OFFSET, + (i + 1) * (20 + 4096)); } static int diff --git a/mt7603_regs.h b/mt7603_regs.h index 0ec505dd..a5415192 100644 --- a/mt7603_regs.h +++ b/mt7603_regs.h @@ -439,6 +439,10 @@ enum { #define MT_TBTT_TIMER_CFG MT_LPON(0x05c) +#define MT_LPON_SBTOR(n) MT_LPON(0x0a0) +#define MT_LPON_SBTOR_SUB_BSS_EN BIT(29) +#define MT_LPON_SBTOR_TIME_OFFSET GENMASK(19, 0) + #define MT_INT_WAKEUP_BASE 0x24400 #define MT_INT_WAKEUP(n) (MT_INT_WAKEUP_BASE + (n))