From c61405c98e2ed87d3b3696b7f533381f10c58f03 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Sat, 6 Feb 2016 18:05:39 +0100 Subject: [PATCH] mt7603: add support for setting WMM parameters Signed-off-by: Felix Fietkau --- mt7603_main.c | 38 +++++++++++++++++++++++++++++++++++++- mt7603_regs.h | 18 ++++++++++++++++++ 2 files changed, 55 insertions(+), 1 deletion(-) diff --git a/mt7603_main.c b/mt7603_main.c index 1b3bf8d8..222a5c84 100644 --- a/mt7603_main.c +++ b/mt7603_main.c @@ -263,7 +263,43 @@ static int mt7603_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, const struct ieee80211_tx_queue_params *params) { - return -EINVAL; + struct mt7603_dev *dev = hw->priv; + u16 cw_min = (1 << 5) - 1; + u16 cw_max = (1 << 10) - 1; + u32 val; + + if (params->cw_min) + cw_min = params->cw_min; + if (params->cw_max) + cw_max = params->cw_max; + + mutex_lock(&dev->mutex); + mt7603_mac_stop(dev); + + val = mt76_rr(dev, MT_WMM_TXOP(queue)); + val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(queue)); + val |= params->txop << MT_WMM_TXOP_SHIFT(queue); + mt76_wr(dev, MT_WMM_TXOP(queue), val); + + val = mt76_rr(dev, MT_WMM_AIFSN); + val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(queue)); + val |= params->aifs << MT_WMM_AIFSN_SHIFT(queue); + mt76_wr(dev, MT_WMM_AIFSN, val); + + val = mt76_rr(dev, MT_WMM_CWMIN); + val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(queue)); + val |= cw_min << MT_WMM_CWMIN_SHIFT(queue); + mt76_wr(dev, MT_WMM_CWMIN, val); + + val = mt76_rr(dev, MT_WMM_CWMAX(queue)); + val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(queue)); + val |= cw_max << MT_WMM_CWMAX_SHIFT(queue); + mt76_wr(dev, MT_WMM_CWMAX(queue), val); + + mt7603_mac_start(dev); + mutex_unlock(&dev->mutex); + + return 0; } static void diff --git a/mt7603_regs.h b/mt7603_regs.h index d0120da8..bca51dba 100644 --- a/mt7603_regs.h +++ b/mt7603_regs.h @@ -159,6 +159,19 @@ #define MT_WF_ARB_BASE 0x21400 #define MT_WF_ARB(ofs) (MT_WF_ARB_BASE + (ofs)) +#define MT_WMM_AIFSN MT_WF_ARB(0x020) +#define MT_WMM_AIFSN_MASK GENMASK(3, 0) +#define MT_WMM_AIFSN_SHIFT(_n) ((_n) * 4) + +#define MT_WMM_CWMAX_BASE MT_WF_ARB(0x028) +#define MT_WMM_CWMAX(_n) (MT_WMM_CWMAX_BASE + (((_n) / 2) << 2)) +#define MT_WMM_CWMAX_SHIFT(_n) (((_n) & 1) * 16) +#define MT_WMM_CWMAX_MASK GENMASK(15, 0) + +#define MT_WMM_CWMIN MT_WF_ARB(0x040) +#define MT_WMM_CWMIN_MASK GENMASK(7, 0) +#define MT_WMM_CWMIN_SHIFT(_n) ((_n) * 8) + #define MT_WF_ARB_RQCR MT_WF_ARB(0x070) #define MT_WF_ARB_RQCR_RX_START BIT(0) #define MT_WF_ARB_RQCR_RXV_START BIT(4) @@ -199,6 +212,11 @@ #define MT_WF_TMAC_RDG_GRANT_NO_PENDING BIT(30) #define MT_WF_TMAC_SMOOTHING BIT(31) +#define MT_WMM_TXOP_BASE MT_WF_TMAC(0x010) +#define MT_WMM_TXOP(_n) (MT_WMM_TXOP_BASE + (((_n) / 2) << 2)) +#define MT_WMM_TXOP_SHIFT(_n) ((_n & 1) * 16) +#define MT_WMM_TXOP_MASK GENMASK(15, 0) + #define MT_WF_RMAC_BASE 0x21800 #define MT_WF_RMAC(ofs) (MT_WF_RMAC_BASE + (ofs))