From af425def8cb67d10aa5a0dd59437633673e9af5f Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Thu, 16 Nov 2017 18:09:06 +0100 Subject: [PATCH] mt76x2: fix LNA gain register annotation Signed-off-by: Felix Fietkau --- mt76x2_dfs.c | 2 +- mt76x2_phy.c | 10 +++++----- mt76x2_regs.h | 7 ++++++- 3 files changed, 12 insertions(+), 7 deletions(-) diff --git a/mt76x2_dfs.c b/mt76x2_dfs.c index 01714d66..5b452a59 100644 --- a/mt76x2_dfs.c +++ b/mt76x2_dfs.c @@ -447,7 +447,7 @@ void mt76x2_dfs_adjust_agc(struct mt76x2_dev *dev) val_r4 += (((val_r8 + 1) >> 1) << 24); mt76_wr(dev, MT_BBP(AGC, 4), val_r4); - dfs_r31 = FIELD_GET(MT_BBP_AGC_LNA_GAIN, val_r4); + dfs_r31 = FIELD_GET(MT_BBP_AGC_LNA_HIGH_GAIN, val_r4); dfs_r31 += val_r8; dfs_r31 -= (agc_r8 & 0x00000038) >> 3; dfs_r31 = (dfs_r31 << 16) | 0x00000307; diff --git a/mt76x2_phy.c b/mt76x2_phy.c index 1fca4a7f..a7bcb359 100644 --- a/mt76x2_phy.c +++ b/mt76x2_phy.c @@ -20,13 +20,13 @@ #include "mt76x2_eeprom.h" static void -mt76x2_adjust_lna_gain(struct mt76x2_dev *dev, int reg, s8 offset) +mt76x2_adjust_high_lna_gain(struct mt76x2_dev *dev, int reg, s8 offset) { s8 gain; - gain = FIELD_GET(MT_BBP_AGC_LNA_GAIN, mt76_rr(dev, MT_BBP(AGC, reg))); + gain = FIELD_GET(MT_BBP_AGC_LNA_HIGH_GAIN, mt76_rr(dev, MT_BBP(AGC, reg))); gain -= offset / 2; - mt76_rmw_field(dev, MT_BBP(AGC, reg), MT_BBP_AGC_LNA_GAIN, gain); + mt76_rmw_field(dev, MT_BBP(AGC, reg), MT_BBP_AGC_LNA_HIGH_GAIN, gain); } static void @@ -44,8 +44,8 @@ mt76x2_apply_gain_adj(struct mt76x2_dev *dev) { s8 *gain_adj = dev->cal.rx.high_gain; - mt76x2_adjust_lna_gain(dev, 4, gain_adj[0]); - mt76x2_adjust_lna_gain(dev, 5, gain_adj[1]); + mt76x2_adjust_high_lna_gain(dev, 4, gain_adj[0]); + mt76x2_adjust_high_lna_gain(dev, 5, gain_adj[1]); mt76x2_adjust_agc_gain(dev, 8, gain_adj[0]); mt76x2_adjust_agc_gain(dev, 9, gain_adj[1]); diff --git a/mt76x2_regs.h b/mt76x2_regs.h index fddda286..e9da7867 100644 --- a/mt76x2_regs.h +++ b/mt76x2_regs.h @@ -503,7 +503,12 @@ #define MT_BBP_AGC_R0_BW GENMASK(14, 12) /* AGC, R4/R5 */ -#define MT_BBP_AGC_LNA_GAIN GENMASK(21, 16) +#define MT_BBP_AGC_LNA_HIGH_GAIN GENMASK(21, 16) +#define MT_BBP_AGC_LNA_MID_GAIN GENMASK(13, 8) +#define MT_BBP_AGC_LNA_LOW_GAIN GENMASK(5, 0) + +/* AGC, R6/R7 */ +#define MT_BBP_AGC_LNA_ULOW_GAIN GENMASK(5, 0) /* AGC, R8/R9 */ #define MT_BBP_AGC_GAIN GENMASK(14, 8)