diff --git a/mt7603.h b/mt7603.h
index efb7c0a8..d49dfd0b 100644
--- a/mt7603.h
+++ b/mt7603.h
@@ -21,6 +21,8 @@
 #define MT7603_WTBL_SIZE	128
 #define MT7603_WTBL_RESERVED	(MT7603_WTBL_SIZE - 1)
 
+#define MT7603_RATE_RETRY	2
+
 #define MT7603_FIRMWARE_E1	"mt7603_e1.bin"
 #define MT7603_FIRMWARE_E2	"mt7603_e2.bin"
 
diff --git a/mt7603_init.c b/mt7603_init.c
index 5c11df77..29ac914c 100644
--- a/mt7603_init.c
+++ b/mt7603_init.c
@@ -218,7 +218,16 @@ mt7603_mac_init(struct mt7603_dev *dev)
 	mt76_rmw_field(dev, MT_WF_RMACDR, MT_WF_RMACDR_MBSSID_MASK, 2);
 
 	mt76_wr(dev, MT_AGG_ARUCR, 0);
-	mt76_wr(dev, MT_AGG_ARDCR, ~0);
+	mt76_wr(dev, MT_AGG_ARDCR,
+		MT76_SET(MT_AGG_ARxCR_LIMIT(0), MT7603_RATE_RETRY - 1) |
+		MT76_SET(MT_AGG_ARxCR_LIMIT(1), MT7603_RATE_RETRY - 1) |
+		MT76_SET(MT_AGG_ARxCR_LIMIT(2), MT7603_RATE_RETRY - 1) |
+		MT76_SET(MT_AGG_ARxCR_LIMIT(3), MT7603_RATE_RETRY - 1) |
+		MT76_SET(MT_AGG_ARxCR_LIMIT(4), MT7603_RATE_RETRY - 1) |
+		MT76_SET(MT_AGG_ARxCR_LIMIT(5), MT7603_RATE_RETRY - 1) |
+		MT76_SET(MT_AGG_ARxCR_LIMIT(6), MT7603_RATE_RETRY - 1) |
+		MT76_SET(MT_AGG_ARxCR_LIMIT(7), MT7603_RATE_RETRY - 1));
+
 	mt76_wr(dev, MT_AGG_ARCR, (MT_AGG_ARCR_INIT_RATE1 |
 				   MT76_SET(MT_AGG_ARCR_RTS_RATE_THR, 2)));
 }