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mt76: add mt76x02_phy_set_txpower utility routine
Add mt76x02_phy_set_txpower utility routine in mt76x02_phy.c in order to be reused in mt76x0 tx power management code. Moreover move following routines in mt76x02-lib module: - mt76x02_tx_power_mask - mt76x02_get_max_rate_power - mt76x02_limit_rate_power - mt76x02_add_rate_power_offset Signed-off-by: Lorenzo Bianconi <[email protected]> Signed-off-by: Felix Fietkau <[email protected]>
This commit is contained in:
committed by
Felix Fietkau
parent
f802bd5f14
commit
2214aa5a24
@@ -0,0 +1,97 @@
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/*
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* Copyright (C) 2016 Felix Fietkau <[email protected]>
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* Copyright (C) 2018 Lorenzo Bianconi <[email protected]>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <linux/kernel.h>
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#include "mt76.h"
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#include "mt76x02_phy.h"
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static u32
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mt76x02_tx_power_mask(u8 v1, u8 v2, u8 v3, u8 v4)
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{
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u32 val = 0;
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val |= (v1 & (BIT(6) - 1)) << 0;
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val |= (v2 & (BIT(6) - 1)) << 8;
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val |= (v3 & (BIT(6) - 1)) << 16;
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val |= (v4 & (BIT(6) - 1)) << 24;
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return val;
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}
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int mt76x02_get_max_rate_power(struct mt76_rate_power *r)
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{
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s8 ret = 0;
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int i;
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for (i = 0; i < sizeof(r->all); i++)
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ret = max(ret, r->all[i]);
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return ret;
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}
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EXPORT_SYMBOL_GPL(mt76x02_get_max_rate_power);
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void mt76x02_limit_rate_power(struct mt76_rate_power *r, int limit)
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{
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int i;
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for (i = 0; i < sizeof(r->all); i++)
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if (r->all[i] > limit)
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r->all[i] = limit;
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}
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EXPORT_SYMBOL_GPL(mt76x02_limit_rate_power);
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void mt76x02_add_rate_power_offset(struct mt76_rate_power *r, int offset)
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{
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int i;
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for (i = 0; i < sizeof(r->all); i++)
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r->all[i] += offset;
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}
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EXPORT_SYMBOL_GPL(mt76x02_add_rate_power_offset);
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void mt76x02_phy_set_txpower(struct mt76_dev *dev, int txp_0, int txp_1)
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{
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struct mt76_rate_power *t = &dev->rate_power;
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__mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_0,
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txp_0);
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__mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_1,
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txp_1);
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__mt76_wr(dev, MT_TX_PWR_CFG_0,
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mt76x02_tx_power_mask(t->cck[0], t->cck[2], t->ofdm[0],
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t->ofdm[2]));
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__mt76_wr(dev, MT_TX_PWR_CFG_1,
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mt76x02_tx_power_mask(t->ofdm[4], t->ofdm[6], t->ht[0],
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t->ht[2]));
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__mt76_wr(dev, MT_TX_PWR_CFG_2,
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mt76x02_tx_power_mask(t->ht[4], t->ht[6], t->ht[8],
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t->ht[10]));
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__mt76_wr(dev, MT_TX_PWR_CFG_3,
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mt76x02_tx_power_mask(t->ht[12], t->ht[14], t->stbc[0],
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t->stbc[2]));
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__mt76_wr(dev, MT_TX_PWR_CFG_4,
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mt76x02_tx_power_mask(t->stbc[4], t->stbc[6], 0, 0));
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__mt76_wr(dev, MT_TX_PWR_CFG_7,
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mt76x02_tx_power_mask(t->ofdm[7], t->vht[8], t->ht[7],
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t->vht[9]));
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__mt76_wr(dev, MT_TX_PWR_CFG_8,
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mt76x02_tx_power_mask(t->ht[14], 0, t->vht[8], t->vht[9]));
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__mt76_wr(dev, MT_TX_PWR_CFG_9,
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mt76x02_tx_power_mask(t->ht[7], 0, t->stbc[8], t->stbc[9]));
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}
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EXPORT_SYMBOL_GPL(mt76x02_phy_set_txpower);
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